代码搜索:fpga

找到约 10,000 项符合「fpga」的源代码

代码结果 10,000
www.eeworm.com/read/145129/12752327

txt 双2-4译码器:74139.txt

-- Dual 2-to-4 Decoder -- A set of conditional signal assignments model a dual 2-to-4 decoder -- uses 1993 std VHDL -- download from: www.pld.com.cn & www.fpga.com.cn library IEEE; use IEEE.Std
www.eeworm.com/read/145129/12752330

txt 带三态输出的8位d寄存器:74374.txt

-- Octal D-Type Register with 3-State Outputs -- Simple model of an Octal D-type register with three-state outputs using two concurrent statements. -- download from: www.fpga.com.cn & www.pld.com.cn
www.eeworm.com/read/145059/12754547

txt 移位寄存器:74164.txt

-- TTL164 Shift Register -- download from: www.fpga.com.cn & www.pld.com.cn library IEEE; use IEEE.Std_logic_1164.all; ENTITY dev164 IS PORT(a, b, nclr, clock : IN BIT; q : BUFFE
www.eeworm.com/read/145059/12754605

txt 经典双进程状态机(含test beach).txt

-- Classic 2-Process State Machine and Test Bench -- MEALY TYPE STATE MACHINE EXAMPLE -- dowload from: www.fpga.com.cn & www.pld.com.cn library ieee; use ieee.std_logic_1164.all; ENTITY fsm I
www.eeworm.com/read/145059/12754611

txt 带同步复位的状态机.txt

-- State Machine with Asynchronous Reset -- dowload from: www.fpga.com.cn & www.pld.com.cn library ieee; use ieee.std_logic_1164.all; entity stmch1 is port(clk, in1, rst: in std_logic;
www.eeworm.com/read/145059/12754634

txt 双2-4译码器:74139.txt

-- Dual 2-to-4 Decoder -- A set of conditional signal assignments model a dual 2-to-4 decoder -- uses 1993 std VHDL -- download from: www.pld.com.cn & www.fpga.com.cn library IEEE; use IEEE.Std
www.eeworm.com/read/145059/12754635

txt 带三态输出的8位d寄存器:74374.txt

-- Octal D-Type Register with 3-State Outputs -- Simple model of an Octal D-type register with three-state outputs using two concurrent statements. -- download from: www.fpga.com.cn & www.pld.com.cn
www.eeworm.com/read/141285/13024705

txt 双2-4译码器 74139.txt

-- Dual 2-to-4 Decoder -- A set of conditional signal assignments model a dual 2-to-4 decoder -- uses 1993 std VHDL -- download from: www.pld.com.cn & www.fpga.com.cn library IEEE; use IEEE.Std
www.eeworm.com/read/141282/13024738

txt 移位寄存器:74164.txt

-- TTL164 Shift Register -- download from: www.fpga.com.cn & www.pld.com.cn library IEEE; use IEEE.Std_logic_1164.all; ENTITY dev164 IS PORT(a, b, nclr, clock : IN BIT; q : BUFFE
www.eeworm.com/read/141282/13024745

txt 带三态输出的8位d寄存器:74374(注2).txt

-- Octal D-Type Register with 3-State Outputs -- Simple model of an Octal D-type register with three-state outputs using two concurrent statements. -- download from: www.fpga.com.cn & www.pld.com.cn