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找到约 10,000 项符合「fpga」的源代码

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www.eeworm.com/read/141282/13024817

txt 多路选择器if else.txt

--Multiplexer 16-to-4 using if-then-elsif-else Statement -- download from www.pld.com.cn & www.fpga.com.cn library ieee; use ieee.std_logic_1164.all; entity mux is port( a, b, c, d:
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www.eeworm.com/read/141282/13024819

txt 多路选择器select.txt

--Multiplexer 16-to-4 using if-then-elsif-else Statement -- download from www.pld.com.cn & www.fpga.com.cn library ieee; use ieee.std_logic_1164.all; entity mux is port( a, b, c, d:
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www.eeworm.com/read/139685/13139841

txt counter_nbit.txt

-- n-Bit Synchronous Counter -- dowload from: www.fpga.com.cn & www.pld.com.cn LIBRARY ieee; USE ieee.Std_logic_1164.ALL; USE ieee.Std_logic_unsigned.ALL; ENTITY cntrnbit IS GENERIC(
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www.eeworm.com/read/139685/13139845

txt multiplexer_ifelse.txt

-- Multiplexer 16-to-4 using if-then-elsif-else Statement -- download from www.pld.com.cn & www.fpga.com.cn library ieee; use ieee.std_logic_1164.all; entity mux is port( a, b, c, d:
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www.eeworm.com/read/139685/13139856

txt prebus.txt

VHDL:Tri-State Buses download from: http://www.fpga.com.cn prebus.vhd LIBRARY IEEE; USE ieee.std_logic_1164.ALL; ENTITY prebus IS PORT( my_in : IN STD_LOGIC_VECTOR(7 D
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www.eeworm.com/read/139685/13139860

txt multiplexer_ifelse2.txt

-- Multiplexer 16-to-4 using if-then-elsif-else Statement -- download from www.pld.com.cn & www.fpga.com.cn library ieee; use ieee.std_logic_1164.all; entity mux is port( a, b, c, d:
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www.eeworm.com/read/139685/13139891

txt multiplexer_ifelse1.txt

-- Multiplexer 16-to-4 using if-then-elsif-else Statement -- download from www.pld.com.cn & www.fpga.com.cn library ieee; use ieee.std_logic_1164.all; entity mux is port( a, b, c, d:
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www.eeworm.com/read/319921/13439504

txt 多路选择器（使用when－else语句）.txt

-- Multiplexer 16-to-4 using if-then-elsif-else Statement -- download from www.pld.com.cn & www.fpga.com.cn library ieee; use ieee.std_logic_1164.all; entity mux is port( a, b, c, d:
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www.eeworm.com/read/319921/13439524

txt 三态总线（注2）.txt

VHDL:Tri-State Buses download from: http://www.fpga.com.cn prebus.vhd LIBRARY IEEE; USE ieee.std_logic_1164.ALL; ENTITY prebus IS PORT( my_in : IN STD_LOGIC_VECTOR(7 D
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www.eeworm.com/read/316203/13528461

txt multiplexer_ifelse.txt

-- Multiplexer 16-to-4 using if-then-elsif-else Statement -- download from www.pld.com.cn & www.fpga.com.cn library ieee; use ieee.std_logic_1164.all; entity mux is port( a, b, c, d:
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