代码搜索：efficient

找到约 1,594 项符合「efficient」的源代码

代码结果 1,594
热门代码： main.c GPIO I2C SPI UART timer interrupt ADC PWM LED
www.eeworm.com/read/305986/13755590

vhd 各种功能的计数器.vhd

-- MAX+plus II VHDL Example -- Efficient Counter Inference -- Copyright (c) 1994 Altera Corporation -- download from:www.pld.com.cn & www.fpga.com.cn Library IEEE ; use IEEE.std_logic_1164.all
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www.eeworm.com/read/305054/13779379

txt 各种功能的计数器.vhd.txt

-- MAX+plus II VHDL Example -- Efficient Counter Inference -- Copyright (c) 1994 Altera Corporation -- download from:www.pld.com.cn & www.fpga.com.cn Library IEEE ; use IEEE.std_logic_1164.all
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www.eeworm.com/read/101082/6246030

3cur wnoutrefresh.3cur

.TH wnoutrefresh 3cur .SH Name wnoutrefresh, doupdate \- do efficient refresh .SH Syntax .br .B #include .PP .br .B int wnoutrefresh(win) .br .B WINDOW \(**win; .PP .B int doupdate(\|) .S
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www.eeworm.com/read/101082/6247891

3cur wnoutrefresh.3cur

.TH wnoutrefresh 3cur .SH Name wnoutrefresh, doupdate \- do efficient refresh .SH Syntax .br .B #include .PP .br .B int wnoutrefresh(win) .br .B WINDOW \(**win; .PP .B int doupdate(\|) .S
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www.eeworm.com/read/382666/6286480

vhd 各种功能的计数器.vhd

-- MAX+plus II VHDL Example -- Efficient Counter Inference -- Copyright (c) 1994 Altera Corporation -- download from:www.pld.com.cn & www.fpga.com.cn Library IEEE ; use IEEE.std_logic_1164.all
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www.eeworm.com/read/220831/6296483

s51 bcdcal.s51

;Author: rom.cheng@analog.com ;Due to C limit of using DA instrution, BCD operations are not efficient in C program. NAME BCDCal PUBLIC BCD32Inc FUNCTION BCD32Inc,0203H PUBLIC H
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www.eeworm.com/read/494695/6360541

vhd 各种功能的计数器.vhd

-- MAX+plus II VHDL Example -- Efficient Counter Inference -- Copyright (c) 1994 Altera Corporation -- download from:www.pld.com.cn & www.fpga.com.cn Library IEEE ; use IEEE.std_logic_1164.all
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www.eeworm.com/read/487908/6501809

vhd 各种功能的计数器.vhd

-- MAX+plus II VHDL Example -- Efficient Counter Inference -- Copyright (c) 1994 Altera Corporation -- download from:www.pld.com.cn & www.fpga.com.cn Library IEEE ; use IEEE.std_logic_1164.all
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www.eeworm.com/read/263314/11367849

vhd counters_altera.vhd

-- MAX+plus II VHDL Example -- Efficient Counter Inference -- Copyright (c) 1994 Altera Corporation -- download from:www.pld.com.cn & www.fpga.com.cn Library IEEE ; use IEEE.std_logic_1164.all
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www.eeworm.com/read/157209/11730201

txt 各种功能的计数器.txt

-- MAX+plus II VHDL Example -- Efficient Counter Inference -- Copyright (c) 1994 Altera Corporation -- download from:www.pld.com.cn & www.fpga.com.cn Library IEEE ; use IEEE.std_logic_1164.all
·