代码搜索:dataIn

找到约 2,888 项符合「dataIn」的源代码

代码结果 2,888
www.eeworm.com/read/494695/6360558

txt 汉明纠错吗编码器.txt

-- Hamming Encoder -- A 4-bit Hamming Code encoder using concurrent assignments. -- The output vector is connected to the individual parity bits using an aggregate assignment. -- download from: w
www.eeworm.com/read/489800/6461511

rpt mealy.rpt

Project Information d:\vhdlexperiments\maxplus\experiment7\mealy.rpt MAX+plus II Compiler Report File Version 10.0 9/14/2000 Compiled: 05/04/2009 16:13:04 Copyright (C) 1988-2000 Alt
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hier_info block.hier_info

|block clk => b[3]~reg0.CLK clk => b[2]~reg0.CLK clk => b[1]~reg0.CLK clk => b[0]~reg0.CLK clk => c[3]~reg0.CLK clk => c[2]~reg0.CLK clk => c[1]~reg0.CLK clk => c[0]~reg0.CLK a[0] => b[0]~reg
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txt 汉明纠错吗编码器.txt

-- Hamming Encoder -- A 4-bit Hamming Code encoder using concurrent assignments. -- The output vector is connected to the individual parity bits using an aggregate assignment. -- download from: w
www.eeworm.com/read/482073/6626119

txt readme.txt

请运行程序,并在程序所在文件夹下面创建文本文件:<mark>datain</mark>.txt和paramOut.txt,文件的详细说明见下面。程序的运行没有可视的界面,运行完毕之后会在该文件夹下面产生center.txt和matrix.txt两个文件,其中center.txt为聚类的中心,matrix.txt为隶属度矩阵。在运行本程序之前,先参考一下FCM聚类算法介绍.doc 输入文件: <mark>datain</mark>.txt ...
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v segmain.v

module segmain ( clk, rst, datain, dataout, ledcom ); input clk; input rst; input [15:0] datain; output [3:0] dataout; output [3:0] ledcom; reg [3:0] led
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txt readme.txt

1. compile: mpicc dwt.c -o dwt 2. run: mpirun -np 4 dwt 3. result: One dimensional wavelet transform's input data from file dataIn.txt h[] : -1 0 1 2 g[] : 1 1 0 3 c[] : 1 4 2 5
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txt hamming_encoder.txt

-- Hamming Encoder -- A 4-bit Hamming Code encoder using concurrent assignments. -- The output vector is connected to the individual parity bits using an aggregate assignment. -- download from: w
www.eeworm.com/read/262703/11394592

pin fm.pin

-- Copyright (C) 1991-2006 Altera Corporation -- Your use of Altera Corporation's design tools, logic functions -- and other software and tools, and its AMPP partner logic -- functions, and a
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v segmain.v

module segmain ( clk, rst, datain, dataout, ledcom ); input clk; input rst; input [15:0] datain; output [3:0] dataout; output [3:0] ledcom; reg [3:0] led