代码搜索：dataIn
找到约 2,888 项符合「dataIn」的源代码
代码结果 2,888
www.eeworm.com/read/318894/3560729
h t11.h
/* This is a test for maxidx: tst8 */
#define NX 16
#define FNAME "t11"
#define MAXERROR 0
#pragma DATA_SECTION (x,".datain")
DATA x[NX] ={
2,
21,
3,
4,
5,
4,
3,
2,
6,
7,
8,
9,
10,
21,
18,
20,
};
DA
www.eeworm.com/read/318894/3560730
h t6.h
/* This is a test for maxidx: tst3 */
#define NX 15
#define FNAME "t6"
#define MAXERROR 0
#pragma DATA_SECTION (x,".datain")
DATA x[NX] ={
1,
2,
3,
20,
5,
4,
3,
2,
6,
7,
8,
9,
10,
9,
18,
};
DATA rte
www.eeworm.com/read/318894/3560732
h t10.h
/* This is a test for maxidx: tst7 */
#define NX 16
#define FNAME "t10"
#define MAXERROR 0
#pragma DATA_SECTION (x,".datain")
DATA x[NX] ={
2,
21,
3,
4,
5,
4,
3,
2,
6,
7,
8,
9,
10,
9,
18,
21,
};
DAT
www.eeworm.com/read/318894/3560734
h t7.h
/* This is a test for maxidx: tst4 */
#define NX 16
#define FNAME "t7"
#define MAXERROR 0
#pragma DATA_SECTION (x,".datain")
DATA x[NX] ={
1,
2,
3,
4,
5,
4,
3,
2,
6,
7,
8,
9,
10,
9,
18,
20,
};
DATA
www.eeworm.com/read/317481/3579602
sym vga_display.sym
VERSION 5
BEGIN SYMBOL
SYMBOLTYPE BLOCK
TIMESTAMP 2006 1 8 15 11 22
SYMPIN 0 -288 Input w_addr(9:0)
SYMPIN 0 -224 Input wr
SYMPIN 0 -160 Input mclk
SYMPIN 0 -96 Input datain(7:0)
SYMPIN 0 -32
www.eeworm.com/read/293180/3934607
hier_info mux21.hier_info
|MUX21
A => Y~reg0.ADATA
B => Y~reg0.DATAIN
S => Y~reg0.CLK
RST => Y~reg0.ALOAD
EN => Y~reg0.ENA
Y
www.eeworm.com/read/408400/2249399
hier_info mux21.hier_info
|MUX21
A => Y~reg0.ADATA
B => Y~reg0.DATAIN
S => Y~reg0.CLK
RST => Y~reg0.ALOAD
EN => Y~reg0.ENA
Y
www.eeworm.com/read/268098/11154475
sym vga_display.sym
VERSION 5
BEGIN SYMBOL
SYMBOLTYPE BLOCK
TIMESTAMP 2006 1 8 15 11 22
SYMPIN 0 -288 Input w_addr(9:0)
SYMPIN 0 -224 Input wr
SYMPIN 0 -160 Input mclk
SYMPIN 0 -96 Input datain(7:0)
SYMPIN 0 -32
www.eeworm.com/read/388626/8591314
hier_info keyboard.hier_info
|keyboard
keyboard_clk => filter[7].DATAIN
keyboard_data => SHIFTIN~0.DATAB
keyboard_data => process1~0.IN1
clock_50Mhz => filter[7].CLK
clock_50Mhz => filter[6].CLK
clock_50Mhz => filter[5].CLK
www.eeworm.com/read/286533/8760656
hier_info pd.hier_info
|pd
sUp vgactr:inst.clkin
Iiclk => inst1.DATAIN
Iin[0] => vgactr:inst.IIN[0]
Iin[1] => vgactr:inst.IIN[1]
Iin[2] => vgactr:inst.IIN[2]
Iin[3] => vgactr:inst.IIN[3]