代码搜索：byte

找到约 10,000 项符合「byte」的源代码

代码结果 10,000
热门代码： main.c GPIO I2C SPI UART timer interrupt ADC PWM LED
www.eeworm.com/read/17853/762625

v i2c_master_byte_ctrl.v

///////////////////////////////////////////////////////////////////// //// //// //// WISHBONE rev.B2 compliant I2C Master byte-controller
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stx i2c_master_byte_ctrl.stx

Release 6.1i - xst G.23 Copyright (c) 1995-2003 Xilinx, Inc. All rights reserved. --> Parameter TMPDIR set to . CPU : 0.00 / 0.96 s | Elapsed : 0.00 / 1.00 s --> WARNING:Xst:1885 - LSO file is empt
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ngr i2c_master_byte_ctrl.ngr

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v i2c_master_byte_ctrl.v

// synopsys translate_off `include "timescale.v" // synopsys translate_on `include "i2c_master_defines.v" module i2c_master_byte_ctrl ( clk, rst, nReset, ena, clk_cnt, start, stop, read, write, a
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bin i2c_master_byte_ctrl.bin

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lso i2c_master_byte_ctrl.lso

work
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xst i2c_master_byte_ctrl.xst

set -tmpdir __projnav set -xsthdpdir ./xst run -ifn i2c_master_byte_ctrl.prj -ifmt mixed -ofn i2c_master_byte_ctrl -ofmt NGC -p xc2s50e-6-tq144 -top i2c_master_byte_ctrl -opt_mode Speed -opt
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ngc i2c_master_byte_ctrl.ngc

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prj i2c_master_byte_ctrl.prj

verilog work i2c_master_bit_ctrl.v verilog work i2c_master_byte_ctrl.v
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syr i2c_master_byte_ctrl.syr

Release 6.1i - xst G.23 Copyright (c) 1995-2003 Xilinx, Inc. All rights reserved. --> Parameter TMPDIR set to __projnav CPU : 0.00 / 0.20 s | Elapsed : 0.00 / 0.00 s --> Parameter xsthdpdir set to
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