代码搜索：adder
找到约 6,792 项符合「adder」的源代码
代码结果 6,792
www.eeworm.com/read/326428/13142794
v adder16.v
`include "adder.v"
module adder16(cout,sum,a,b,cin);
output cout;
parameter my_size=16;
output[my_size-1:0] sum;
input[my_size-1:0] a,b;
input cin;
adder my_adder(cout,sum,a,b,cin);
endmod
www.eeworm.com/read/241378/13148351
v rbcla_adder.v
//
// S.Arvind
// 2/3/99
// Ripple-Block Carry Look Ahead Adder
// Reference: Computer Arithmetic Algorithms - Israel Koren
// Computer Arithmetic Systems - Amos R. Om
www.eeworm.com/read/326116/13165202
v adder16.v
`include "adder.v"
module adder16(cout,sum,a,b,cin);
output cout;
parameter my_size=16;
output[my_size-1:0] sum;
input[my_size-1:0] a,b;
input cin;
adder my_adder(cout,sum,a,b,cin);
endmod
www.eeworm.com/read/326116/13165480
v adder8.v
module adder8(cout,sum,ina,inb,cin,clk);
output[7:0] sum;
output cout;
input[7:0] ina,inb;
input cin,clk;
reg[7:0] tempa,tempb,sum;
reg cout;
reg tempc;
always @(posedge clk)
begin
tempa=i
www.eeworm.com/read/326116/13165534
acf adder4.acf
--
-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any
www.eeworm.com/read/326116/13165541
v adder4.v
module adder4(cout,sum,ina,inb,cin);
output[3:0] sum;
output cout;
input[3:0] ina,inb;
input cin;
assign {cout,sum}=ina+inb+cin;
endmodule
www.eeworm.com/read/326116/13165547
ndb adder4.ndb
NDB006
The number of symbol table entries is: 1
The length of the symbol table is: 2
Index Hierarchy Path
----- --------------
! |
The number of name info structs is : 1
InsOrder BitField
www.eeworm.com/read/326116/13165550
v adder_tp.v
`timescale 1ns/1ns
`include "adder4.v"
module adder_tp;
reg[3:0] a,b;
reg cin;
wire[3:0] sum;
wire cout;
integer i,j;
adder4 adder(sum,cout,a,b,cin);
always #5 cin=~cin;
initial
begin
www.eeworm.com/read/326116/13165556
hif adder4.hif
HIF003
--
-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, an
www.eeworm.com/read/324566/13257549
txt vhdl-adder.txt
VHDL加法器
-- N-bit adder
-- The width of the adder is determined by generic N
library IEEE;
use IEEE.std_logic_1164.all;
entity adderN is
generic(N : integer := 16);
port (a :