代码搜索:adder

找到约 6,792 项符合「adder」的源代码

代码结果 6,792
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psp bypass_adder.psp

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hif bypass_adder.hif

Version 6.0 Build 178 04/27/2006 SJ Full Version 39 2097 OFF OFF OFF OFF OFF FV_OFF Level2 0 0 VRSM_ON VHSM_ON 0 -- Start Partition -- -- End Partition -- -- Start Library Paths -- -
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pin bypass_adder.pin

-- Copyright (C) 1991-2006 Altera Corporation -- Your use of Altera Corporation's design tools, logic functions -- and other software and tools, and its AMPP partner logic -- functions, and a
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v adder16.v

`include "adder.v" module adder16(cout,sum,a,b,cin); output cout; parameter my_size=16; output[my_size-1:0] sum; input[my_size-1:0] a,b; input cin; adder my_adder(cout,sum,a,b,cin); endmod
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v adder8.v

module adder8(cout,sum,ina,inb,cin,clk); output[7:0] sum; output cout; input[7:0] ina,inb; input cin,clk; reg[7:0] tempa,tempb,sum; reg cout; reg tempc; always @(posedge clk) begin tempa=i
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acf adder4.acf

-- -- Copyright (C) 1988-2002 Altera Corporation -- Any megafunction design, and related net list (encrypted or decrypted), -- support information, device programming or simulation file, and any
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v adder4.v

module adder4(cout,sum,ina,inb,cin); output[3:0] sum; output cout; input[3:0] ina,inb; input cin; assign {cout,sum}=ina+inb+cin; endmodule
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ndb adder4.ndb

NDB006 The number of symbol table entries is: 1 The length of the symbol table is: 2 Index Hierarchy Path ----- -------------- ! | The number of name info structs is : 1 InsOrder BitField
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v adder_tp.v

`timescale 1ns/1ns `include "adder4.v" module adder_tp; reg[3:0] a,b; reg cin; wire[3:0] sum; wire cout; integer i,j; adder4 adder(sum,cout,a,b,cin); always #5 cin=~cin; initial begin
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hif adder4.hif

HIF003 -- -- Copyright (C) 1988-2002 Altera Corporation -- Any megafunction design, and related net list (encrypted or decrypted), -- support information, device programming or simulation file, an