代码搜索：adder
找到约 6,792 项符合「adder」的源代码
代码结果 6,792
www.eeworm.com/read/318858/3561721
pcf adder.pcf
SCHEMATIC START ;
// created by map version G.28 on Fri Feb 24 02:12:33 2006
COMP "A" LOCATE = SITE "P163" LEVEL 1;
COMP "A" LOCATE = SITE "P161" LEVEL 1;
COMP "A" LOCATE = SITE "P1
www.eeworm.com/read/318858/3561724
par adder.par
Release 6.2i Par G.28
Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved.
TOMWANG:: Fri Feb 24 02:12:34 2006
C:/Xilinx/bin/nt/par.exe -w -intstyle ise -ol std -t 1 adder_map.ncd adder.ncd
www.eeworm.com/read/318858/3561725
v adder.v
// 实验名称 : 加法器
// 程序名称 : adder.v
// 日 期 : 2001/2/20
//*********************************************************
// 定义模块（module）
//***********************
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mrp adder.mrp
Release 6.2i Map G.28
Xilinx Mapping Report File for Design 'adder'
Design Information
------------------
Command Line : C:/Xilinx/bin/nt/map.exe -intstyle ise -p xc2s200-pq208-6 -cm
area -pr b -k
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ucf adder.ucf
#PACE: Start of Constraints generated by PACE
#PACE: Start of PACE I/O Pin Assignments
NET "A" LOC = "p163" ;
NET "A" LOC = "p161" ;
NET "A" LOC = "p109" ;
NET "A" LOC = "p11
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twr adder.twr
--------------------------------------------------------------------------------
Release 6.2i Trace G.28
Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved.
C:/Xilinx/bin/nt/trce.exe -ints
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lfp adder.lfp
# begin LFP file f:\trainsilicon\fpgaschool\testcade\fpga40xc200\basic1\examples\adder\ise\adder\adder.lfp
designfile adder.ngd
IO_GROUP "SUM" IO_GROUP="adder" ;
IO_GROUP "B" IO_GROUP="adder" ;
IO