代码搜索：abnormal

找到约 161 项符合「abnormal」的源代码

代码结果 161
热门代码： main.c GPIO I2C SPI UART timer interrupt ADC PWM LED
www.eeworm.com/read/342270/12032204

txt ftp源代码.txt

#include ; #include ; #define NORMAL 0 #define ABNORMAL 1 #define ON 1 #define OFF 0 main (argc, argv) int
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www.eeworm.com/read/162614/5518509

c pr24231-1.c

/* { dg-do compile } */ /* { dg-options "-O2" } */ /* FRE testcase for PR 24231, problem with PRE coalescing abnormal phis. */ struct f { int i; }; struct h{h();}; int g(void); int g1(void) throw()
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www.eeworm.com/read/162614/5518544

c pr24231-2.c

/* { dg-do compile } */ /* { dg-options "-O2" } */ /* FRE testcase for PR 24231, problem with PRE coalescing abnormal phis. */ struct f { int i; }; struct h{h();}; int g(void); int g1(void) throw()
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www.eeworm.com/read/472378/6876306

hea 231.hea

231 2 360 650000 231.dat 212 200 11 1024 984 31762 0 MLII 231.dat 212 200 11 1024 1039 -12178 0 V1 # 72 F 2009 2851 x2 # None # AV conduction is quite abnormal with periods of 2:1 AV block, examp
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www.eeworm.com/read/170912/9779891

c ftp.c

#include #include #define NORMAL 0 #define ABNORMAL 1 #define ON 1 #define OFF 0 main( int argc, char *argv[] ) {
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www.eeworm.com/read/265027/11285553

asm vold.asm

;MODULE: VOLD.ASM ; ;FUNCTION: CHECK BATTERY VOLTAGE ; ;***************************************************************************; ; VO
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www.eeworm.com/read/208012/15255864

txt 新建 文本文档 (2).txt

附录1 //头文件 #include #include typedef unsigned char BYTE; typedef unsigned int WORD; typedef bit BOOL ; #define unchar unsigned char // 系统工作状态 unsigned char WorkState;
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www.eeworm.com/read/295363/8167785

txt sim_rtl08115.txt

ncverilog: 05.10-p004: (c) Copyright 1995-2003 Cadence Design Systems, Inc. TOOL: ncverilog 05.10-p004: Started on Aug 11, 2005 at 14:00:49 ncverilog +turbo +turbo+2 +turbo+3 +access+rw +incdir+.
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www.eeworm.com/read/295363/8167802

txt sim_rtl08114.txt

ncverilog: 05.10-p004: (c) Copyright 1995-2003 Cadence Design Systems, Inc. TOOL: ncverilog 05.10-p004: Started on Aug 11, 2005 at 12:21:25 ncverilog +turbo +turbo+2 +turbo+3 +access+rw +incdir+.
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www.eeworm.com/read/295363/8167840

txt sim_rtl81002.txt

ncverilog: 05.10-p004: (c) Copyright 1995-2003 Cadence Design Systems, Inc. TOOL: ncverilog 05.10-p004: Started on Aug 10, 2005 at 10:18:00 ncverilog +turbo +turbo+2 +turbo+3 +access+rw +incdir+.
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