代码搜索:XDS 560 V2

找到约 7,632 项符合「XDS 560 V2」的源代码

代码结果 7,632
www.eeworm.com/read/202262/15387468

m riddling.m

%产生一个N(0,1)正态分布随机数 %采用筛选法,精度较高 %其他方法可参阅《现代应用数学手册--概率统计与随机过程卷》清华大学出版社马振华主编 %function y=riddling() function y=riddling() sign=0; while 1 x=rand(1,2); v1=2*x(1)-1;v2=2*x(2)-1; s=v1^2
www.eeworm.com/read/137750/13300672

dat dj.dat

0,0,2,6,-7,0,3,0,-1,0,1,0,0,1,5,5,-8,0,1,1,1,1,0,1,1,1,0,2,6,2,0,5,2,2,264,560,-871,3,270,556,-849,3,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
www.eeworm.com/read/389657/8509258

m 白噪声产生程序.m

% 【2】白噪声产生程序 A=6; x0=1; M=255; f=2; N=100; for k=1:N x2=A*x0; x1=mod (x2,M); v1=x1/256; v(:,k)=(v1-0.5)*f; x0=x1; v0=v1; end v2=v k1=k; %grapher k=1:k1; plot(k,v,k,v,'r'); xlabel('k
www.eeworm.com/read/432195/8620548

asm 12232.asm

;***************ET-12232AV1、V2、V3、V4、V5、CV1模块测试程序***************** RESET EQU P3.6 E1 EQU P3.1 E2 EQU P3.2 R_W EQU P3.3 A0 EQU P3.0 CHOE1 EQU 20H.0 CHOE2 EQU 20H.1 D_ROW EQU 30H D_PAGE
www.eeworm.com/read/431062/8710169

txt 1_2.txt

!warehouses成员; WH1 WH2 WH3 WH4 WH5 WH6 ~ !vendors成员; V1 V2 V3 V4 V5 V6 V7 V8 ~ !产量; 60 55 51 43 41 52 ~ !销量; 35 37 22 32 41 32 43 38 ~ !单位运输费用矩阵; 6 2 6 7 4 2 5 9 4 9 5 3 8 5 8 2
www.eeworm.com/read/281452/9155162

m adapting.m

%适值计算 % 测试函数为f(x,y)=100(x^2-y)^2+(1-x)^2, -2.048
www.eeworm.com/read/281452/9155168

asv adapting.asv

%适值计算 % 测试函数为f(x,y)=100(x^2-y)^2+(1-x)^2, -2.048
www.eeworm.com/read/375119/9372006

wrd 新概念英语第三册.wrd

[W]guinea[T]'gini[M]n.几尼(英国金币) [W]mania[T]'meinj2[M]n.癖好 [W]West Virginia[T]'west v2'd7i:ni2[M]西弗吉尼亚州 [W]Persia[T]'p2:62[M]波斯(现称伊朗) [W]puma[T]'pju:m2[M]n.美洲狮 [W]phenomena[T]fi'n0min2[M]n.现象 [W]c
www.eeworm.com/read/164882/10084143

lib default.lib

.SUBCKT VoltageSources PULSE+ PULSE- SIN+ SIN- PWL+ PWL- FM+ FM- VClock PULSE+ PULSE- PULSE( 0 5 0.5e-3 1e-6 1e-6 0.5e-3 1e-3 ) v2 SIN+ SIN- SIN( 0 5 1000 0 0 ) v3 PWL+ PWL- PWL( 1e-4 0 2e-4 1 3e-4
www.eeworm.com/read/355709/10249602

lib default.lib

.SUBCKT VoltageSources PULSE+ PULSE- SIN+ SIN- PWL+ PWL- FM+ FM- VClock PULSE+ PULSE- PULSE( 0 5 0.5e-3 1e-6 1e-6 0.5e-3 1e-3 ) v2 SIN+ SIN- SIN( 0 5 1000 0 0 ) v3 PWL+ PWL- PWL( 1e-4 0 2e-4 1 3e-4