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找到约 19,564 项符合 Verilog 的代码

_primary.vhd

library verilog; use verilog.vl_types.all; entity iobufd_f is port( o : out vl_logic; io : inout vl_logic; i : in vl_logic

_primary.vhd

library verilog; use verilog.vl_types.all; entity obuf_lvttl_f_4 is generic( cds_action : string := "ignore" ); port( o : out vl_logic; i

_primary.vhd

library verilog; use verilog.vl_types.all; entity obufdn_s_24 is generic( cds_action : string := "ignore" ); port( o : out vl_logic; i

_primary.vhd

library verilog; use verilog.vl_types.all; entity ibuf_agp is generic( cds_action : string := "ignore" ); port( o : out vl_logic; i

_primary.vhd

library verilog; use verilog.vl_types.all; entity obuft_lvcmos33_s_12 is generic( cds_action : string := "ignore" ); port( o : out vl_logic;

_primary.vhd

library verilog; use verilog.vl_types.all; entity ofdt is generic( cds_action : string := "ignore"; init : integer := 0 ); port( o :

_primary.vhd

library verilog; use verilog.vl_types.all; entity ibufds_lvpecl_33 is generic( cds_action : string := "ignore" ); port( o : out vl_logic; i

_primary.vhd

library verilog; use verilog.vl_types.all; entity obuft_hstl_iii_dci is generic( cds_action : string := "ignore" ); port( o : out vl_logic; i

_primary.vhd

library verilog; use verilog.vl_types.all; entity iobuf_n_s_24 is port( o : out vl_logic; io : inout vl_logic; i : in vl_lo

_primary.vhd

library verilog; use verilog.vl_types.all; entity or4b1 is generic( cds_action : string := "ignore" ); port( o : out vl_logic; i0