代码搜索：Verilog
找到约 10,000 项符合「Verilog」的源代码
代码结果 10,000
www.eeworm.com/read/159314/5584787
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity ilflxi_1 is
generic(
cds_action : string := "ignore";
init : integer := 1
);
port(
q
www.eeworm.com/read/159314/5584792
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity ofdx_24 is
generic(
cds_action : string := "ignore";
init : integer := 0
);
port(
q
www.eeworm.com/read/159314/5584799
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity ram64x1d_1 is
generic(
cds_action : string := "ignore";
init : integer := 0
);
port(
dpo
www.eeworm.com/read/159314/5584807
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity iobuf_lvcmos25_s_8 is
port(
o : out vl_logic;
io : inout vl_logic;
i : in
www.eeworm.com/read/159314/5584808
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity srlc16e is
generic(
cds_action : string := "ignore";
init : integer := 0
);
port(
q
www.eeworm.com/read/159314/5584810
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity iobuf_lvcmos18_f_4 is
port(
o : out vl_logic;
io : inout vl_logic;
i : in
www.eeworm.com/read/159314/5584816
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity iobuf_lvcmos33_s_8 is
port(
o : out vl_logic;
io : inout vl_logic;
i : in
www.eeworm.com/read/159314/5584820
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity ilflxi_1f is
generic(
cds_action : string := "ignore";
init : integer := 1
);
port(
q
www.eeworm.com/read/159314/5584824
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity ram16x1 is
generic(
cds_action : string := "ignore";
init : integer := 0
);
port(
o
www.eeworm.com/read/159314/5584826
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity ram16x1d is
generic(
cds_action : string := "ignore";
init : integer := 0
);
port(
dpo