代码搜索结果
找到约 19,564 项符合
Verilog 的代码
_primary.vhd
library verilog;
use verilog.vl_types.all;
entity obuf_gtl_dci is
generic(
cds_action : string := "ignore"
);
port(
o : out vl_logic;
i
_primary.vhd
library verilog;
use verilog.vl_types.all;
entity iobufns_s is
port(
o : out vl_logic;
io : inout vl_logic;
i : in vl_logic
_primary.vhd
library verilog;
use verilog.vl_types.all;
entity rdclk is
generic(
cds_action : string := "ignore"
);
port(
i : in vl_logic
);
end rdclk;
_primary.vhd
library verilog;
use verilog.vl_types.all;
entity ibuf_lvcmos33 is
generic(
cds_action : string := "ignore"
);
port(
o : out vl_logic;
i
_primary.vhd
library verilog;
use verilog.vl_types.all;
entity bufgce_1 is
port(
o : out vl_logic;
ce : in vl_logic;
i : in vl_logic
_primary.vhd
library verilog;
use verilog.vl_types.all;
entity iobuf_24 is
port(
o : out vl_logic;
io : inout vl_logic;
i : in vl_logic;
_primary.vhd
library verilog;
use verilog.vl_types.all;
entity iobufnsn_s_24 is
port(
o : out vl_logic;
io : inout vl_logic;
i : in vl_l
_primary.vhd
library verilog;
use verilog.vl_types.all;
entity ramb4_s1_s8 is
generic(
cds_action : string := "ignore";
init_00 : integer := 0;
init_01 : integer :
_primary.vhd
library verilog;
use verilog.vl_types.all;
entity obuf_pci66_3 is
generic(
cds_action : string := "ignore"
);
port(
o : out vl_logic;
i
_primary.vhd
library verilog;
use verilog.vl_types.all;
entity iobuf_f_12 is
port(
o : out vl_logic;
io : inout vl_logic;
i : in vl_logi