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library verilog; use verilog.vl_types.all; entity ibuf_hstl_iv_dci_18 is generic( cds_action : string := "ignore" ); port( o : out vl_logic;

library verilog; use verilog.vl_types.all; entity obuft_lvcmos33_s_4 is generic( cds_action : string := "ignore" ); port( o : out vl_logic; i

library verilog; use verilog.vl_types.all; entity ibufg_hstl_ii_18 is generic( cds_action : string := "ignore" ); port( o : out vl_logic; i

library verilog; use verilog.vl_types.all; entity obuft_s_6 is generic( cds_action : string := "ignore" ); port( o : out vl_logic; i

library verilog; use verilog.vl_types.all; entity iobuf_lvcmos33_f_16 is port( o : out vl_logic; io : inout vl_logic; i : in

library verilog; use verilog.vl_types.all; entity iobuf_f_8 is port( o : out vl_logic; io : inout vl_logic; i : in vl_logic

library verilog; use verilog.vl_types.all; entity ofdti_24 is generic( cds_action : string := "ignore"; init : integer := 1 ); port( o

library verilog; use verilog.vl_types.all; entity tms is generic( cds_action : string := "ignore" ); port( i : inout vl_logic ); end tms;

library verilog; use verilog.vl_types.all; entity ibufgds_lvds_33 is generic( cds_action : string := "ignore" ); port( o : out vl_logic; i

library verilog; use verilog.vl_types.all; entity ofdx_fu is generic( cds_action : string := "ignore"; init : integer := 0 ); port( q