代码搜索结果

{E:/SOC/VHDL/Lab/Lab 1/lab1/nandgate.vhd} {1 {vcom -work work -2002 -explicit {E:/SOC/VHDL/Lab/Lab 1/lab1/nandgate.vhd} Model Technology ModelSim SE vcom 6.0 Compiler 2004.08 Aug 19 2004 -- Loading

create_project leon add_file -library WORK -format VHDL ../leon/amba.vhd add_file -library WORK -format VHDL ../leon/target.vhd add_file -library WORK -format VHDL ../leon/device.vhd add_file -librar

#device options set_option -technology Virtex set_option -part XCV300 set_option -package PQ240 set_option -speed_grade -4 #add_file options add_file -vhdl -lib work "../leon/amba.vhd" add_file -vhd

------------------------------------------------------------------------ LEON-1 VHDL model version 2.2c, released on 1 November 2000. (J.Gaisler) Additions: * Flattened hierarchy to simplify addit

------------------------------------------------------------------------------- -- -- ROM core VHDL template. See the macro description included -- behind this frame. -- -- Copyright (C) 2000 Rudolf M

------------------------------------------------------------------------------- -- -- ROM core VHDL template. See the macro description included -- behind this frame. -- -- Copyright (C) 2000 Rudolf M

AVR_Core/VHDL

D/Converters//// D/Doc//// D/VHDL////

The Synthetic PIC Verion 1.1 This is a VHDL synthesizable model of a simple PIC 16C5x microcontroller. It is not, and is not intended as, a high fidelity circuit simulation. This package inc

m255 K3 13 cModel Technology Z0 dC:\MATLAB\toolbox\modelsim\modelsimdemos\vhdl\manchester T_opt Z1 VW>XzMbDkOHC9TD8>3]@k20 Z2 04 7 10 work decoder behavioral 1 Z3 =1-001a73774dd6-496c2fba-1b5-ca8 Z4 o