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VHDL 的代码
ctr_wide_narrow.tbw
version 3
f:\vhdlproject\vhdl0716\narrow_wide_pulse_generate.vhd
narrow_wide_pulse_generate
VHDL
VHDL
ctr_wide_narrow.xwv
Clocked
-
-
10000000000000
ns
GSR:false
PRLD:false
100000000
CLO
wide_narrow_pulse.tbw
version 3
f:\vhdlproject\vhdl0716\narrow_wide_pulse_generate.vhd
narrow_wide_pulse_generate
VHDL
VHDL
wide_narrow_pulse.xwv
Clocked
-
-
1000000000000
ns
GSR:false
PRLD:false
100000000
CL