代码搜索结果

////////////////////////////////////////////////////////////////// // Mathematical Variable Container // // Writer : Boris Kipnis // Last Update : 5/5/2005 // #include "MathVHDL_var.h" #include "

m255 cModel Technology Builtin Library 13 dD:\qa\patch6_2\nightly\master\modeltech Pmath_complex DP work math_real zjAF7SKfg_RPI0GT^n1N`1 OL;C;6.2b;35 31 b1 M1 work math_real OP;C;6.2b;35 d. F$MODEL_

m255 cModel Technology Builtin Library 13 dD:\qa\patch6_2\nightly\master\modeltech Pmath_complex DP work math_real zjAF7SKfg_RPI0GT^n1N`1 OL;C;6.2b;35 31 b1 M1 work math_real OP;C;6.2b;35 d. F$MODEL_

m255 cModel Technology Builtin Library 13 dD:\qa\patch6_2\nightly\master\modeltech Pmath_complex DP work math_real zjAF7SKfg_RPI0GT^n1N`1 OL;C;6.2b;35 31 b1 M1 work math_real OP;C;6.2b;35 d. F$MODEL_

reg4.vhd，reg4_1.vhd,reg8.vhd,add4.gdf,add8.gdf 流水线加法器 mul_8.vhd，mul8.gdf 流水线乘法器 first.vhd,second.vhd 寄存器VHDL优化编码

project open H:/qdesigns/old/cyclone32/cyclone32.quartus project add_assignment "" "" "" "" "SOURCE_FILE" "altera_vhdl_support.vhd"; project add_assignment "" "" "" "" "SOURCE_FILE" "./cnt.vhd";

vhdl work "epp.vhd" vhdl work "seg7.vhd" vhdl work "vga.vhd" vhdl work "clkgen.vhd" vhdl work "pwmmd.vhd" vhdl work "pwmeq.vhd" vhdl work "pwmhi.vhd" vhdl work "pwmlo.vhd" vhdl work "pwm18.vhd

vhdl work "vga.vhd" vhdl work "clkgen.vhd" vhdl work "pwmmd.vhd" vhdl work "pwmeq.vhd" vhdl work "pwmhi.vhd" vhdl work "pwmlo.vhd" vhdl work "pwm2x.vhd" vhdl work "pwminv2x.vhd" vhdl work "pwm

vhdl work "clog.vhd" vhdl work "creg.vhd" vhdl work "cbuff.vhd" vhdl work "cmul.vhd" vhdl work "c2comp.vhd" vhdl work "cadd.vhd" vhdl work "cnop.vhd" vhdl work "cdiv.vhd" vhdl work "cround.vhd

vhdl work "prcctrl.vhd" vhdl work "imgctrl2.vhd" vhdl work "clog.vhd" vhdl work "creg.vhd" vhdl work "cbuff.vhd" vhdl work "cmul.vhd" vhdl work "c2comp.vhd" vhdl work "cadd.vhd" vhdl work "cno