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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0}

############################################################################################ ## ## DSP Builder (Version 6.0) ## Quartus II development tool and MATLAB/Simulink Interface ## ## L

m255 cModel Technology Builtin Library 13 dD:\qa\patch6_2\nightly\master\modeltech Pmath_complex DP work math_real zjAF7SKfg_RPI0GT^n1N`1 OL;C;6.2b;35 31 b1 M1 work math_real OP;C;6.2b;35 d. F$MODEL_

m255 cModel Technology Builtin Library 13 dD:\qa\patch6_2\nightly\master\modeltech Pmath_complex DP work math_real zjAF7SKfg_RPI0GT^n1N`1 OL;C;6.2b;35 31 b1 M1 work math_real OP;C;6.2b;35 d. F$MODEL_

[Library] others = $MODEL_TECH/../modelsim.ini fusion = D:/Actel/Libero/Libero_v8.4/Designer/lib/modelsim/precompiled/vlog/fusion syncad_vhdl_lib = D:\Actel\Libero\Libero_v8.4\Designer/

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0} { "I

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0} { "I

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3} { "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer Quartus II " "Info: Runni

# Copyright (C) 1991-2008 Altera Corporation # Your use of Altera Corporation's design tools, logic functions # and other software and tools, and its AMPP partner logic # functions, and any outpu

Project Information d:\lu\vhdl-digitallogic\disk\ch6\ch6_2_3b.rpt MAX+plus II Compiler Report File Version 9.23 3/19/99 Compiled: 04/02/2000 10:42:23 Copyright (C) 1988-1999 Alter