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VHDL 的代码
logic.prj
vhdl work logic.vhd
top.prj
vhdl work d5_32e.vhd
vhdl work dq24.vhd
vhdl work dq024.vhd
vhdl work logic.vhd
vhdl work count4.vhdl
vhdl work mdecode.vhd
vhdl work sel4_1.vhd
vhdl work DECODE.vhd
vhdl work top.vhf
count4.cmd_log
xst -intstyle ise -ifn __projnav/count4.xst -ofn count4.syr
ngdbuild -dd _ngo -i -p xc9500 count4.ngc count4.ngd
cpldfit -p xc9572-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew slow -in
sel4_1.prj
vhdl work sel4_1.vhd
testadd.prj
vhdl work testadd.vhf
count4.prj
vhdl work count4.vhdl
pepextractor.prj
work devider.vhdl
compact_divider.prj
vhdl work compact_divider.vhdl
devider.prj
vhdl work devider.vhdl
hdllib.ref
EN compact_divider NULL D:/FPGA/仿真/Divider_定点除法器/compact_divider.vhdl sub00/vhpl02
EN devider NULL D:/FPGA/仿真/Divider_定点除法器/devider.vhdl sub00/vhpl00
AR devider behavioral D:/FPGA/仿真/Divider_定点除法器/d