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Project Information d:\vhdl_ex\moore2.rpt MAX+plus II Compiler Report File Version 10.2 07/10/2002 Compiled: 11/15/2003 12:40:55 Copyright (C) 1988-2002 Al

can_top.vhdsim_xlate -- generated only for ProjNav status tracking Simulation Model Target: Generic_VHDL

#-- Synplicity, Inc. #-- Version 6.2.4 #-- Project file mc8051_core.prj #-- Written on Fri Aug 24 19:26:03 2001 #add_file options add_file -vhdl -lib work "../vhdl/mc8051_p.vhd" add_file -vhdl -lib

#-- Synplicity, Inc. #-- Version 6.2.4 #-- Project file mc8051_core.prj #-- Written on Fri Aug 24 19:26:03 2001 #add_file options add_file -vhdl -lib work "../vhdl/mc8051_p.vhd" add_file -vhdl -lib

m255 K3 Z0 cModel Technology Builtin Library 13 Z1 dD:\qa\buildsites\6.3j\builds\win32\modeltech Penv Z2 OL;C;6.3j;37 32 b1 Z3 OP;C;6.3j;37 Z4 w1225426921 Z5 d$MODEL_TECH/.. Z6 8vhdl_src/std/env.vhd Z

m255 K3 Z0 cModel Technology Builtin Library 13 Z1 dD:\qa\buildsites\6.3j\builds\win32\modeltech Penv Z2 OL;C;6.3j;37 32 b1 Z3 OP;C;6.3j;37 Z4 w1225426921 Z5 d$MODEL_TECH/.. Z6 8vhdl_src/std/env.vhd Z

m255 K3 Z0 cModel Technology Builtin Library 13 Z1 dD:\qa\buildsites\6.3j\builds\win32\modeltech Penv Z2 OL;C;6.3j;37 32 b1 Z3 OP;C;6.3j;37 Z4 w1225426921 Z5 d$MODEL_TECH/.. Z6 8vhdl_src/std/env.vhd Z

# Copyright (C) 1991-2006 Altera Corporation # Your use of Altera Corporation's design tools, logic functions # and other software and tools, and its AMPP partner logic # functions, and any outpu

#-- Synplicity, Inc. #-- Version 6.2.4 #-- Project file mc8051_core.prj #-- Written on Fri Aug 24 19:26:03 2001 #add_file options add_file -vhdl -lib work "../vhdl/mc8051_p.vhd" add_file -vhdl -lib

# Copyright (C) 1991-2005 Altera Corporation # Your use of Altera Corporation's design tools, logic functions # and other software and tools, and its AMPP partner logic # functions, and any