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VHDL 的代码
adder_18bit.vhdl
-- $Id: adder_18bit.vhdl,v 1.1.1.1 2005/01/04 02:05:58 arif_endro Exp $
-------------------------------------------------------------------------------
-- Title : Adder 18 bit
-- Project : F
adder_10bit.vhdl
-- $Id: adder_10bit.vhdl,v 1.1.1.1 2005/01/04 02:05:58 arif_endro Exp $
-------------------------------------------------------------------------------
-- Title : Adder 10 bit
-- Project : F
adder_09bit.vhdl
-- $Id: adder_09bit.vhdl,v 1.1.1.1 2005/01/04 02:05:58 arif_endro Exp $
-------------------------------------------------------------------------------
-- Title : Adder 09 bit
-- Project : F
adder_13bit.vhdl
-- $Id: adder_13bit.vhdl,v 1.1.1.1 2005/01/04 02:05:58 arif_endro Exp $
-------------------------------------------------------------------------------
-- Title : Adder 13 bit
-- Project : F
adder_14bit.vhdl
-- $Id: adder_14bit.vhdl,v 1.1.1.1 2005/01/04 02:05:58 arif_endro Exp $
-------------------------------------------------------------------------------
-- Title : Adder 14 bit
-- Project : F
adder_11bit.vhdl
-- $Id: adder_11bit.vhdl,v 1.1.1.1 2005/01/04 02:05:58 arif_endro Exp $
-------------------------------------------------------------------------------
-- Title : Adder 11 bit
-- Project : F
makefile
# [20041030]
# * initial write
# * changing structural
# Makefile for this directory
all : fm
# vasy -V nco.vhdl
# vasy -V rom.vhdl
# vasy -V addacc.vhdl
# verilog :
# vasy -V -v nco.
makefile
# [20041030]
# * initial write
# * changing structural
# Makefile for this directory
all : fm
# vasy -V nco.vhdl
# vasy -V rom.vhdl
# vasy -V addacc.vhdl
# verilog :
# vasy -V -v nco.
input_fm_xil.vhdl
-- $Id: input_fm_xil.vhdl,v 1.1.1.1 2005/01/04 02:05:58 arif_endro Exp $
-------------------------------------------------------------------------------
-- Title : Input signal FM For Xilinx
--
bench_xil.vhdl
-- $Id: bench_xil.vhdl,v 1.1.1.1 2005/01/04 02:05:56 arif_endro Exp $
-------------------------------------------------------------------------------
-- Title : Test Bench For Xilinx
-- Project