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VHDL 的代码
test242_bencher.prj
vhdl work "Hour.vhf"
clock.prj
vhdl work "Plus60.vhf"
vhdl work "Hour.vhf"
vhdl work "alarm.vhf"
vhdl work "CLOCK.vhf"
alarm.prj
vhdl work "Plus60.vhf"
vhdl work "Hour.vhf"
vhdl work "alarm.vhf"
test601.udo
-- ProjNav VHDL simulation template: test601.udo
-- You may edit this file after the line that starts with
-- '-- START' to customize your simulation
-- START user-defined simulation commands
test241.udo
-- ProjNav VHDL simulation template: TEST241.udo
-- You may edit this file after the line that starts with
-- '-- START' to customize your simulation
-- START user-defined simulation commands
test242.udo
-- ProjNav VHDL simulation template: TEST242.udo
-- You may edit this file after the line that starts with
-- '-- START' to customize your simulation
-- START user-defined simulation commands
mc8051_tb_compile.do
#!/bin/csh
vcom ../vhdl/mc8051_p.vhd
vcom ../vhdl/control_mem_.vhd
vcom ../vhdl/control_mem_rtl.vhd
vcom ../vhdl/control_mem_rtl_cfg.vhd
vcom ../vhdl/control_fsm_.vhd
vcom ../vhdl/control_fsm_rtl.vh
mc8051_core.prj
#-- Synplicity, Inc.
#-- Version 6.2.4
#-- Project file mc8051_core.prj
#-- Written on Fri Aug 24 19:26:03 2001
#add_file options
add_file -vhdl -lib work "../vhdl/mc8051_p.vhd"
add_file -vhdl -lib
mc8051_tb_compile.do
#!/bin/csh
vcom ../vhdl/mc8051_p.vhd
vcom ../vhdl/control_mem_.vhd
vcom ../vhdl/control_mem_rtl.vhd
vcom ../vhdl/control_mem_rtl_cfg.vhd
vcom ../vhdl/control_fsm_.vhd
vcom ../vhdl/control_fsm_rtl.vh
mc8051_core.prj
#-- Synplicity, Inc.
#-- Version 6.2.4
#-- Project file mc8051_core.prj
#-- Written on Fri Aug 24 19:26:03 2001
#add_file options
add_file -vhdl -lib work "../vhdl/mc8051_p.vhd"
add_file -vhdl -lib