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100vhdl+
-- _ _
-- L
---------------------------OO-------OO---------------------------------
--
100vhdl+
library ieee;
use ieee.std_logic_1164.all;
use work.p_alarm.all;
entity tb_display_driver is
end tb_display_driver;
architecture tb of tb_display_driver is
component display_driver
100vhdl+
-- _ _
-- L
---------------------------OO-------OO---------------------------------
--
100vhdl+
--************VHDL********************
-- Module : 4-bit register
-- Name : register.vhd
-- Purpose: architecture of 4bit register
-- Comes from: XueYuan publication
-- Date: 1998,9,29
--****
100vhdl+
--******************************************
-- Test Bench
-- Name : test_register.vhd
-- Purpose : test 4-bit register
-- Author : Liu Qinnan
-- Time : 1998,9,29
--*****************
100vhdl+
function WiredOr (V: MVL7_VECTOR) return MVL7 is
-- truth table for "WiredOr" function
constant tbl_WIREDOR: MVL7_TABLE :=
-- -----------------------------------------------
-- | X 0