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找到约 10,970 项符合 VHDL 的代码

test.udo

-- ProjNav VHDL simulation template: test.udo -- You may edit this file after the line that starts with -- '-- START' to customize your simulation -- START user-defined simulation commands

test3.udo

-- ProjNav VHDL simulation template: test3.udo -- You may edit this file after the line that starts with -- '-- START' to customize your simulation -- START user-defined simulation commands

hdllib.ref

EN xmit NULL F:/aa/xmit.vhdl sub00/vhpl06 EN bps NULL F:/aa/bps.vhdl sub00/vhpl02 AR rev main F:/aa/rev.vhdl sub00/vhpl01 AR xmit main F:/aa/xmit.vhdl sub00/vhpl07 AR bps main F:/aa/bps.vhdl sub00

hdpdeps.ref

V1 28 FL E:/aa/ctrl.vhdl 2008/10/31.15:10:16 FL E:/aa/bps.vhdl 2008/10/31.13:43:10 FL d:/xilinxise6.2/aa/rev.vhdl 2008/10/29.23:49:04 FL D:/aa/bps.vhdl 2008/10/31.00:04:36 FL F:/aa/ctrl.vhdl 2008

test1.udo

-- ProjNav VHDL simulation template: test1.udo -- You may edit this file after the line that starts with -- '-- START' to customize your simulation -- START user-defined simulation commands

test5.udo

-- ProjNav VHDL simulation template: test5.udo -- You may edit this file after the line that starts with -- '-- START' to customize your simulation -- START user-defined simulation commands

serial.prj

vhdl work bps.vhdl vhdl work xmit.vhdl vhdl work rev.vhdl vhdl work ctrl.vhdl vhdl work serial.vhdl

test.fdo

## NOTE: Do not edit this file. ## Autogenerated by ProjNav (creatfdo.tcl) on Fri Oct 31 17:07:12 中国标准时间 2008 ## vlib work vcom -93 -explicit bps.vhdl vcom -93 -explicit xmit.vhdl vcom -93 -e