代码搜索结果

#!/bin/csh vcom ../vhdl/mc8051_p.vhd vcom ../vhdl/control_mem_.vhd vcom ../vhdl/control_mem_rtl.vhd vcom ../vhdl/control_mem_rtl_cfg.vhd vcom ../vhdl/control_fsm_.vhd vcom ../vhdl/control

#-- Synplicity, Inc. #-- Version 6.2.4 #-- Project file mc8051_core.prj #-- Written on Fri Aug 24 19:26:03 2001 #add_file options add_file -vhdl -lib work "../vhdl/mc8051_p.vhd" add_file -vhdl -lib

#!/bin/csh vcom ../vhdl/mc8051_p.vhd vcom ../vhdl/control_mem_.vhd vcom ../vhdl/control_mem_rtl.vhd vcom ../vhdl/control_mem_rtl_cfg.vhd vcom ../vhdl/control_fsm_.vhd vcom ../vhdl/control

#-- Synplicity, Inc. #-- Version 6.2.4 #-- Project file mc8051_core.prj #-- Written on Fri Aug 24 19:26:03 2001 #add_file options add_file -vhdl -lib work "../vhdl/mc8051_p.vhd" add_file -vhdl -lib

G:/ww/6硬件电路的设计与实现(有完整的VHDL代码)/EP1C3_10_2_TENNIS/db/TENNIS.sim.vwf 49000 127400 392 78400 0 G:/ww/6硬件电路的设计与实现(有完整的VHDL代码)/EP1C3_10_2_TENNIS/TENNIS.vwf 0 100000 500 100000 0 TENNIS.vwf 0 50000000 541

README file for ERC32 VHDL models v1.0 -------------------------------------- This directory contains the ERC32 VHDL models. See the manual (manual.ps) for details on compilation and usage.

SPI串口的内核实现（vhdl）

work f:\aa\serial.vhdl

-- ProjNav VHDL simulation template: test2.udo -- You may edit this file after the line that starts with -- '-- START' to customize your simulation -- START user-defined simulation commands

work rev.vhdl