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dds_vhdl.rpt
Project Information e:\dds_vhdl\dds_vhdl.rpt
MAX+plus II Compiler Report File
Version 10.2 07/10/2002
Compiled: 09/28/2008 16:26:11
Copyright (C) 1988-2002 Al
dds_vhdl.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity dds_vhdl is
port(clk:in std_logic;
fword:in std_logic_vector(7 downto 0);
pword:in std_logic_ve
vhdl_wildfile.txt
/L15"VHDL" Line Comment = -- Nocase String Chars = " File Extensions = VHD VHO
/Delimiters = ; ( )'=:+-/*|&
/C1"VHDL reserved words"
abs access after alias all and architecture array assert at