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vhdl1.vhd
--/*******************************************************************
-- *
-- * DESCRIPTION: UART transmitter module.
-- *
-- * AUTHOR: Jim Jian
-- *
-- * HISTORY: 1/14/97
-- *
vhdl2.vhd
--/*******************************************************************
-- *
-- * DESCRIPTION: UART receiver module.
-- *
-- * AUTHOR: Jim Jian
-- *
-- * HISTORY: 1/14/96
-- *
--
93vhdl.vhd
-- ------------------------------------------------
-- VHDL STD 1076-1993 keywords
-- ------------------------------------------------
ABS
ACCESS
AFTER
ALIAS
ALL
AND
ARCHITECTURE
ARRAY
ASSE
mti_vhdl.do
#----------------------------------------------------------
# Model Technology VHDL compiler script for the book
# Digital Signal Processing with FPGAs (2.edition)
# Author-EMAIL: Uwe.Meyer-B
vhdl.fc2
#----------------------------------------------------------
# Synopsys FPGA Compiler II VHDL simulation script vhdl.fc2
# for the book: DSP with FPGAs (2. edition)
# Author-EMAIL: Uwe.Meyer-Baese@