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test.m
a=[1 2 3;4 5 6];
d=zeros(1,3);
for i2=1:3,
for k=1:2,
d(1,i2)=d(1,i2)+a(k,i2);
c(i2)=d(1,i2)/2;
end
end
test.pro
SOURCES += main.cpp \
formtest.cpp \
frmtest.cpp
HEADERS += formtest.h \
frmtest.h
TEMPLATE =app
CONFIG += qt qtopia warn_on release
INCLUDEPATH += /opt/arm-linux/include
LANGUAGE = C++
test.v
// Testbench for Micron SDR SDRAM Verilog models
`timescale 1ns / 1ps
module test;
reg [31 : 0] dq; // SDRAM I/O
reg [10 : 0] addr;
test.aspx
test
test_a.c
#include
#include
void main(void)
{
char buffer[8192];
// Try reading head 1, track 1, sector 1
if (biosdisk(2, 0, 1, 1, 1, 1, buffer))
printf("Error acces
test_a.c
#include
#include
void main(void)
{
char buffer[8192];
// Try reading head 1, track 1, sector 1
if (biosdisk(2, 0, 1, 1, 1, 1, buffer))
printf("Error acces
test.cpp
// test.cpp - written and placed in the public domain by Wei Dai
#define _CRT_SECURE_NO_DEPRECATE
#define CRYPTOPP_DEFAULT_NO_DLL
#define CRYPTOPP_ENABLE_NAMESPACE_WEAK 1
#include "dll.h"
#in