代码搜索：Synchronous

找到约 1,924 项符合「Synchronous」的源代码

代码结果 1,924
热门代码： main.c GPIO I2C SPI UART timer interrupt ADC PWM LED
www.eeworm.com/read/479151/1339974

in config.in

mainmenu_option next_comment comment 'Synchronous Serial Interface' tristate 'Synchronous Serial Interface Support' CONFIG_SSI comment 'SSI Bus Drivers' dep_tristate ' CLPS711X SSI support' CONFIG_
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www.eeworm.com/read/295249/8177558

idx word.idx

@f /functions/FD_CLR.html @t FD_CLR - macros for synchronous I/O multiplexing =FD_CLR - macros for synchronous I/O multiplexing @f /functions/_Exit.html @t _Exit, _exit - terminate a process =_
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www.eeworm.com/read/199166/7881163

ucf my_dcm_arwz.ucf

# Generated by Xilinx Architecture Wizard # --- UCF Template Only --- # Cut and paste these attributes into the project's UCF file, if desired INST DCM_SP_INST CLK_FEEDBACK = 1X; INST DCM_SP_INST
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makefile

# # Makefile for Etrax-specific drivers # O_TARGET := drivers.o export-objs := axisflashmap.o obj-y := obj-$(CONFIG_ETRAX_VIRTEX_FPGA) += virtex.o obj-$(CONFIG_ETRAX_ETHERNET) +
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www.eeworm.com/read/278232/10558291

ucf dcm165m_arwz.ucf

# Generated by Xilinx Architecture Wizard # --- UCF Template Only --- # Cut and paste these attributes into the project's UCF file, if desired INST DCM_ADV_INST CLK_FEEDBACK = 1X; INST DCM_ADV_INS
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www.eeworm.com/read/298792/7935406

ucf dcm_160_arwz.ucf

# Generated by Xilinx Architecture Wizard # --- UCF Template Only --- # Cut and paste these attributes into the project's UCF file, if desired INST DCM_ADV_INST CLK_FEEDBACK = 1X; INST DCM_ADV_INS
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www.eeworm.com/read/137311/5825991

makefile

# # Makefile for Etrax-specific drivers # O_TARGET := drivers.o obj-y := obj-$(CONFIG_ETRAX_ETHERNET) += ethernet.o obj-$(CONFIG_ETRAX_SERIAL) += serial.o obj-$(CONFIG_ETRA
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www.eeworm.com/read/477743/6733674

vhdl asyncfifo.vhdl

-- Copyright © 2007 Wesley J. Landaker -- -- This program is free software: you can redistribute it and/or modify -- it under the terms of the GNU General Public License as publis
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www.eeworm.com/read/389062/8550836

v syncore_ram.v

/********************************************************************************** This Module infers Generic Dual Port RAMs in Xilinx or Altera or Actel All RESETs are made Synchronous
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www.eeworm.com/read/389033/8552224

h sync_fifo.h

/************************************************************************ * file name: sync_fifo.h * description: synchronous fifo * * modification history * -------------------- * 2003-
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