代码搜索:State Machine

找到约 10,000 项符合「State Machine」的源代码

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v state2.v

//2-paragraph method to describe FSM //Describe sequential state transition in 1 sequential always block //State transition conditions in the other combinational always block //Package state output
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v state1.v

//1-paragraph method to decribe FSM //Describe state transition, state output, state input condition in only 1 always block //Westor Wang, Dec. 2006 //Verilog Training -- How to write FSM better
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ini cmp_state.ini

35
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ini cmp_state.ini

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ddp u_state.ddp

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dcu u_state.dcu

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pas u_state.pas

unit U_State; interface uses Windows, Messages, SysUtils, Variants, Classes, Graphics, Controls, Forms, Dialogs, ExtCtrls; type TFrm_State = class(TForm) Pshow: TPanel; priva
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dfm u_state.dfm

object Frm_State: TFrm_State Left = 407 Top = 306 BorderStyle = bsNone ClientHeight = 86 ClientWidth = 381 Color = clBtnFace Font.Charset = DEFAULT_CHARSET Font.Color = clWindo
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m bin_state.m

function bin_state = bin_state( int_state, m ) % Copyright Matt C. Valenti % MPRG lab, Virginia Tech % for academic use only % converts an vector of integer into a matrix; the i-th row is the binary
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m int_state.m

function int_state = int_state( state ) % Copyright 1996 Matthew C. Valenti % MPRG lab, Virginia Tech. % for academic use only % converts a row vector of m bits into a integer (base 10) [dummy, m] =