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State Machine 的代码
microcoded.v
//==============================================================================
// EE462: Advanced Digital Systems (F2003)
//
// Microcoded State Machine -- Implementation
//
//
// The synthes
fsm_example2_tb.v
//===== Finite State Machine Example =====
//----- Testbench -----
// Timescale: one time unit = 1ns (e.g., delay specification of #42 means 42ns of time), and
// simulator resolution is 0.1 ns
fsm_example2.v
//===== Finite State Machine Example =====
//----- Synthesizable Circuit -----
module FSM_Example (
// Inputs:
i$Clock, // Master clock
i$Reset, // Master reset (active high)
i$A,
i$B,
i$C,
使用变量的状态机.txt
-- State Machine using Variable
-- dowload from: www.fpga.com.cn & www.pld.com.cn
library ieee;
use ieee.std_logic_1164.all;
ENTITY fsm2 IS
PORT(clock,x : IN BIT; z : OUT BIT);
END fsm
带同步复位的状态机.txt
-- State Machine with Asynchronous Reset
-- dowload from: www.fpga.com.cn & www.pld.com.cn
library ieee;
use ieee.std_logic_1164.all;
entity stmch1 is
port(clk, in1, rst: in std_logic;
nasm.c
/*****************************************************************************
*
* Microchip DeviceNet Stack
* (Network Access State Machine management source code)
*
**********************
lr0.c
/* Generate the nondeterministic finite state machine for Bison.
Copyright (C) 1984, 1986, 1989, 2000, 2001, 2002, 2004 Free
Software Foundation, Inc.
This file is part of Bison, the GNU Co
ps2tolcd.smp_dump.txt
State Machine - |ps2tolcd|ps2_keyboard_interface:inst3|m1_state
Name m1_state.m1_tx_done_recovery m1_state.m1_tx_reset_timer m1_state.m1_rx_falling_edge_marker m1_state.m1_rx_clk_l m1_state.m1_rx_r
lcd_v.smp_dump.txt
State Machine - |lcd_v|lcd:inst1|state
Name state.SETDDRAM1 state.CLEAR state.SETDDRAM state.IDLE state.WRITERAM state.SETCGRAM state.SETFUNCTION state.SHIFT state.SWITCHMODE state.SETMODE state.RE
a6850.smp_dump.txt
State Machine - |a6850|tcntl:u8|transm:u1|state
Name state.stop2 state.stop1 state.parity state.data state.start state.ini
state.ini 0 0 0 0 0 0
state.start 0 0 0 0 1 1
state.data 0 0 0 1 0 1