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// -------------------------------------------------------------------- // >>>>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE

Wed Dec 14 11:11:39 2005

-- Copyright (C) 1991-2005 Altera Corporation -- Your use of Altera Corporation's design tools, logic functions -- and other software and tools, and its AMPP partner logic -- functions,

# Copyright (C) 1991-2005 Altera Corporation # Your use of Altera Corporation's design tools, logic functions # and other software and tools, and its AMPP partner logic # functions, and any

/* 简单的状态机，有8个状态,数码管输出当前状态的编号 state0--state1--state2--state3--state4--state5--state6-state7--state0 */ module state_machine(clk,rst,c,en); input clk,rst; output[7:0] c; reg[7:0] c; output[7:

[ProjectWorkspace] ptn_Child1=Frames ptn_Child2=ActionPoints [ProjectWorkspace.Frames] ptn_Child1=ChildFrames [ProjectWorkspace.Frames.ChildFrames] ptn_Child1=Document-0 ptn_Child2=Document-1

/* Quartus II Version 5.0 Build 148 04/26/2005 SJ Full Version */ JedecChain; FileRevision(JESD32A); DefaultMfr(6E); P ActionCode(Cfg) Device PartName(EPM7128SL84) Path("") File("state_mac

Version 5.0 Build 148 04/26/2005 SJ Full Version 29 1521 OFF OFF OFF OFF OFF FV_OFF VRSM_ON VHSM_ON 0 # entity lpm_counter # case_insensitive # source_file d:|altera|quartus50|librarie