代码搜索结果

vhdl work "state_machine.vhd"

-w -g DebugBitstream:No -g Binary:no -g Gclkdel0:11111 -g Gclkdel1:11111 -g Gclkdel2:11111 -g Gclkdel3:11111 -g ConfigRate:4 -g CclkPin:PullUp -g M0Pin:PullUp -g M1Pin:PullUp -g M2Pin:Pu

Release 7.1i - par H.38 Copyright (c) 1995-2005 Xilinx, Inc. All rights reserved. Tue Mar 14 14:40:57 2006 # NOTE: This file is designed to be imported into a spreadsheet program # such as Microso

AUTO_TS_P2P:FROM:clk:TO:c:1 AUTO_TS_F2P:FROM:state_FFd3.Q:TO:c:1 AUTO_TS_F2P:FROM:state_FFd2.Q:TO:c:1 AUTO_TS_F2P:FROM:state_FFd1.Q:TO:c:1 AUTO_TS_P2P:FROM:clk:TO:c:1 AUTO_TS_F2P:F

Pin Freeze File: version H.42 95144XL144TQ XC95144XL-10-TQ144 clk S:PIN128 rst S:PIN71 c S:PIN118 c S:PIN116 c S:PIN115 c S:PIN113 c S:PIN111 c S:PIN107 c S:PIN106 e

Release 7.1i ngdbuild H.38 Copyright (c) 1995-2005 Xilinx, Inc. All rights reserved. Command Line: ngdbuild -intstyle ise -dd e:\temp\spartan2\vhdl\basic\state/_ngo -uc state_machine.ucf -p xc2s50-

cpldfit: version H.42 Xilinx Inc. Fitter Report Design Name: state_machine Date: 2-21-2006, 1:39PM Device

Release 7.1i Map H.38 Xilinx Mapping Report File for Design 'state_machine' Design Information ------------------ Command Line : D:/Xilinx/bin/nt/map.exe -ise e:\temp\spartan2\vhdl\basic\state\sta

-------------------------------------------------------------------------------- Release 7.1i Trace H.38 Copyright (c) 1995-2005 Xilinx, Inc. All rights reserved. D:/Xilinx/bin/nt/trce.exe -ise

MDF Database: version 1.0 MDF_INFO | state_machine | XC95144XL-10-TQ144 MACROCELL | 0 | 16 | state_FFd2 ATTRIBUTES | 4326256 | 0 OUTPUTMC | 8 | 0 | 17 | 5 | 3 | 3 | 0 | 5 | 8 | 5 | 9 | 5 | 7 | 7