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Tue Dec 04 20:26:53 2007

# Copyright (C) 1991-2005 Altera Corporation # Your use of Altera Corporation's design tools, logic functions # and other software and tools, and its AMPP partner logic # functions, and any

# Copyright (C) 1991-2005 Altera Corporation # Your use of Altera Corporation's design tools, logic functions # and other software and tools, and its AMPP partner logic # functions, and any

Version 5.0 Build 148 04/26/2005 SJ Full Version 32 1592 OFF OFF OFF OFF OFF FV_OFF VRSM_ON VHSM_ON 0 # entity speaker # logic_option { AUTO_RAM_RECOGNITION ON } # case_insensitive

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity speaker is port(clk:in std_logic; tone:in std_logic_vector(10 downto 0); spks:out std_logic); end entity

-- Copyright (C) 1991-2005 Altera Corporation -- Your use of Altera Corporation's design tools, logic functions -- and other software and tools, and its AMPP partner logic -- functions,

/* WARNING: Do NOT edit the input and output ports in this file in a text editor if you plan to continue editing the block that represents it in the Block Editor! File corruption is VERY likely to