代码搜索：Sim
找到约 10,000 项符合「Sim」的源代码
代码结果 10,000
www.eeworm.com/read/252731/12265762
class sim.class
www.eeworm.com/read/252715/12266411
out sim.out
ATTENTION: TSIM is an ARCHITECTURAL MODEL.
CYCLE COUNTS are APPROXIMATE.
**********************************************
banks:1 lines:16 ways:2 bits:256 speed:0
***********************
www.eeworm.com/read/252296/12287298
txt sim.txt
*** Processing Option File for IF Simulator ***
Intermediate Frequency (MHz) : 15.42
Sampling Frequency (MHz) : 4.75
C/N0 (dB
www.eeworm.com/read/338388/12310508
mdl sim.mdl
Model {
Name "sim"
Version 6.3
MdlSubVersion 0
GraphicalInterface {
NumRootInports 0
NumRootOutports 0
ParameterArgumentNames ""
ComputedModelVersion
www.eeworm.com/read/149908/12334347
c sim.c
/* Simulate a network path by introducing delay (propagation and queuing),
* bandwidth (delay as a function of packet size), duplication and loss.
* Intended for use with the loopback interface
www.eeworm.com/read/251156/12360628
ini sim.ini
/******************************************************************************/
/* SIM.INI: Simulator Initialization File */
/***********************************
www.eeworm.com/read/337198/12384277
do sim.do
vlib work
vmap work work
vlog -f vlog.args
vsim -novopt cpu_test