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Serial 的代码
serial_lcd.c
/************************************************
文件：serial_lcd.c
用途：ST7920驱动程序
注意：
创建：2008.1.26
修改：2008.1.26
Copy Right (c) www.avrvi.com AVR与虚拟仪器
******************************************
serial_lcd.s
.module serial_lcd.c
.area text(rom, con, rel)
.dbfile D:\avrvi\AVRVi_m128_Starter_Kit\ST7920\source\lib\serial_lcd.c
.dbfunc e delay_lcd _delay_lcd fV
; j -> R16
;
serial_lcd.o
XL
H 1 areas E global symbols
M serial_lcd.c
S push_gset1 Ref0000
S push_gset2 Ref0000
S push_gset3 Ref0000
S pop_gset1 Ref0000
S pop_gset2 Ref0000
S pop_gset3 Ref0000
A text size 36A flags 0
serial_lcd.lis
.module serial_lcd.c
.area text(rom, con, rel)
0000 .dbfile D:\avrvi\AVRVi_m128_Starter_Kit\ST7920\source\lib\serial_lcd.c
0000
serial_pal.v
module serial_pal(clk,reset,en,in,out);
input clk,reset,en,in;
output[3:0] out;
reg[3:0] out;
always @(posedge clk)
begin
if(reset) out
serial2.v
module serial2(q,a,clk);
output q,a;
input clk;
reg q,a;
always @(posedge clk)
begin
a=~q;
q=~q;
end
endmodule
serial1.v
module serial1(q,a,clk);
output q,a;
input clk;
reg q,a;
always @(posedge clk)
begin
q=~q;
a=~q;
end
endmodule
serial_pal.v
module serial_pal(clk,reset,en,in,out);
input clk,reset,en,in;
output[3:0] out;
reg[3:0] out;
always @(posedge clk)
begin
if(reset) out
serial2.v
module serial2(q,a,clk);
output q,a;
input clk;
reg q,a;
always @(posedge clk)
begin
a=~q;
q=~q;
end
endmodule