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Serial 的代码
serial1.v
module serial1(q,a,clk);
output q,a;
input clk;
reg q,a;
always @(posedge clk)
begin
q=~q;
a=~q;
end
endmodule
serial_test.c
#include
#include
#include
/*
void Uart_Send_Str(char *SendDataBuf);
void InitUart(void);
void Led_Blink(uchar t);
void Delay_50us(uint _time);
*/
ucha
serial_test.__i
"Serial_test.c" BROWSE DEBUG OBJECTEXTEND
serial_test.lst
C51 COMPILER V7.50 SERIAL_TEST 07/01/2005 22:26:02 PAGE 1
C51 COMPILER V7.50, COMPILATION OF MODULE SERIAL_TEST
OBJECT MODULE PLACE
tiny_serial.c
/*
* Tiny Serial driver
*
* Copyright (C) 2002-2004 Greg Kroah-Hartman (greg@kroah.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU G
serial_verilog.cdf
/* Quartus II Version 5.1 Build 216 03/06/2006 Service Pack 2 SJ Full Version */
JedecChain;
FileRevision(JESD32A);
DefaultMfr(6E);
P ActionCode(Cfg)
Device PartName(EPM1270T144) Path("")
serial_test.vhd
--
-- 本模块的功能是验证实现和PC机进行基本的串口通信的功能。需要在
--PC机上安装一个串口调试工具来验证程序的功能。
-- 程序实现了一个收发一帧10个bit（即无奇偶校验位）的串口控
--制器，10个bit是1位起始位，8个数据位，1个结束
--位。串口的波特律由程序中定义的div_par参数决定，更改该参数可以实
--现相应的波特率。程序当前设定的div_par 的值 ...
serial_verilog.bdf
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to
serial_verilog.done
Sun Nov 19 22:43:06 2006