代码搜索结果

SCHEMATIC START ; // created by map version G.23 on Mon May 21 22:45:33 2007 SCHEMATIC END ;

*SPICE Netlist generated by Advanced Sim server on 2007-7-27 10:01:30 *for: 1.nsx *Schematic Netlist: .SAVE 0 NetC1_2 NetC2_2 NetR10_2 NetR2_1 NetR3_2 NetR4_2 NetR5_2 NetR6_2 NetR7_2 .SAVE Net

//: C16:Drawing.cpp // From Thinking in C++, 2nd Edition // Available at http://www.BruceEckel.com // (c) Bruce Eckel 2000 // Copyright notice in Copyright.txt #include // Uses Standard

(ExpressProject "" (ProjectVersion "19981106") (ProjectType "PCB") (Folder "Design Resources" (Folder "Library") (File ".\amcc405ep1.1_release.dsn" (Type "Schematic Design"))

//! ************************************************************************** // Written by: Map H.42 on Fri Nov 21 11:14:29 2008 //! ***************************************************************

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0}

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0}

Checking Pins and Pin Connections -------------------------------------------------- Checking Schematic: SCHEMATIC1 -------------------------------------------------- Checking Electrical Rules

Checking Pins and Pin Connections -------------------------------------------------- Checking Schematic: SCHEMATIC1 -------------------------------------------------- Checking Electrical Rules

//! ************************************************************************** // Written by: Map J.36 on Sun Dec 02 20:42:34 2007 //! ***************************************************************