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[Common] ProductName=Unified Nexar/Protel Network License TransactorID=000000 TransactorName=Your Name ProductID=17530 VersionID=0 TID=17530 NodeDetailsID=0000 UserCount=1000 ActivationCode=0

@OrCAD Simulation Server Version: 1.0 @Settings: 0 1 @General: ProfileName= "fly_tans" ProfileFile= "fly_back_test-schematic1-fly_tans.sim" DesignFile= "fly_back_test.dsn" 0 ProjectFile= "f

EAGLE Version 4.11 Copyright (c) 1988-2003 CadSoft Electrical Rule Check for D:/c/EAGLE-4.11/projects/tof/675/untitled.sch at 4/05/2005 11:35:06a Board and schematic are consistent 0 err

SCHEMATIC START ; // created by map version G.28 on Wed Jun 13 11:02:20 2007 SCHEMATIC END ;

SCHEMATIC START ; // created by map version G.28 on Wed Jun 27 00:05:16 2007 COMP "time2" LOCATE = SITE "P89" LEVEL 1; COMP "time1" LOCATE = SITE "P61" LEVEL 1; COMP "time2" LOCATE =

Checking Pins and Pin Connections -------------------------------------------------- Checking Schematic: SCHEMATIC1 -------------------------------------------------- Checking Electrical Rules

Checking Pins and Pin Connections -------------------------------------------------- Checking Schematic: SCHEMATIC1 -------------------------------------------------- Checking Electrical Rules

SCHEMATIC START ; // created by map version G.35 on Wed May 30 01:42:54 2007 SCHEMATIC END ;

//: C16:Drawing.cpp // From Thinking in C++, 2nd Edition // Available at http://www.BruceEckel.com // (c) Bruce Eckel 2000 // Copyright notice in Copyright.txt #include // Uses Standard

//: C16:Drawing.cpp // From Thinking in C++, 2nd Edition // Available at http://www.BruceEckel.com // (c) Bruce Eckel 2000 // Copyright notice in Copyright.txt #include // Uses Standard