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(ExpressProject "" (ProjectVersion "19981106") (ProjectType "PCB") (Folder "Design Resources" (Folder "Library") (File ".\抢答器.dsn" (Type "Schematic Design")) (BuildFileA

Protel Advanced Schematic Annotation Report for 'Sheet1.Sch' 22:31:08 2-Apr-2008 S? => S1 S? => S2 S? => S3 S? => S4 R?

*SPICE Netlist generated by Advanced Sim server on 2007-7-27 10:01:30 *for: 1.nsx *Schematic Netlist: .SAVE 0 NetC1_2 NetC2_2 NetR10_2 NetR2_1 NetR3_2 NetR4_2 NetR5_2 NetR6_2 NetR7_2 .SAVE Net

The schematic is at foler schematic. The hex file is at foler default. You can compiler the code yourself using AvrStudio4.13 b528 + WinAVR20070122

JDF B // Created by Version 6.1 PROJECT WASH DESIGN wash Normal DEVKIT ispLSI1016-60LH44/883 ENTRY ABEL/Schematic STIMULUS wash.abv MODULE kzmk.abl MODSTYLE KZMK Normal MODULE con159.abl MO

Checking Pins and Pin Connections -------------------------------------------------- Checking Schematic: SCHEMATIC1 -------------------------------------------------- Checking Electrical Rules

Checking Pins and Pin Connections -------------------------------------------------- Checking Schematic: SCHEMATIC1 -------------------------------------------------- Checking Electrical Rules

Checking Pins and Pin Connections -------------------------------------------------- Checking Schematic: SCHEMATIC1 -------------------------------------------------- Checking Electrical Rules

Checking Pins and Pin Connections -------------------------------------------------- Checking Schematic: SCHEMATIC1 -------------------------------------------------- Checking Electrical Rules

SCHEMATIC START ; // created by map version G.28 on Tue Aug 14 11:41:07 2007 SCHEMATIC END ;