代码搜索：Scan
找到约 10,000 项符合「Scan」的源代码
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www.eeworm.com/read/427148/8972947
c quant4x4_normal.c
/*!
*************************************************************************************
* \file quant4x4.c
*
* \brief
* Quantization process for a 4x4 block
*
* \author
* Mai
www.eeworm.com/read/381044/9113560
vhd keyboard.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity keyboard is
port(clk:in std_logic;
row:in std_logic_vector(3 downto 0);
com:
www.eeworm.com/read/281861/9128835
vhd led.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY led IS
PORT(
clk : IN STD_LOGIC; --全局时钟
ena : IN STD_LOGIC_VECTOR(5 DOWNTO 0);
flicker_ena : IN STD_LO
www.eeworm.com/read/379424/9198102
h key.h
#ifndef __KEY_h__
#define __KEY_h__
// write your header here
void Key_Init(void);
void Key_Scan(void);
unsigned Key_Get(void);
#define KEY_1 0x01
#define KEY_2 0x02
#define KEY_3 0x04
www.eeworm.com/read/378166/9249312
h key.h
#ifndef __KEY_h__
#define __KEY_h__
// write your header here
void Key_Init(void);
void Key_Scan(void);
unsigned Key_Get(void);
#define KEY8 0x01
#define KEY7 0x02
#define KEY6 0x04
#d
www.eeworm.com/read/377553/9271653
vhd traffic_lib.vhd
--declaraction of package traffic_lib including component "clk_gen"
--"traffic_mux" "count_down" "traffic_fsm"
library ieee;
use ieee.std_logic_1164.all;
package traffic_lib is
component clk_g
www.eeworm.com/read/178935/9381895
dls lib.dls
DLSL
1
CLK7.VHDLVIEW U6645366.DLS
CLK7-BEHAV.SYNTHESISVIEW U2692382.DLS
CLK7-BEHAV.VHDLVIEW U8319220.DLS
CLK7-BEHAVE.SYNTHESISVIEW U0159383.DLS
CLK7-BEHAVE.VHDLVIEW U9652668.DLS
M6_1SCAN.VHDLVI