代码搜索：Scan
找到约 10,000 项符合「Scan」的源代码
代码结果 10,000
www.eeworm.com/read/240876/13189795
vhd scan4.vhd
--The IEEE standard 1164 package, declares std_logic, rising_edge(), etc.
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
entity scan4 is
www.eeworm.com/read/240876/13189816
vhd scan_count.vhd
--scan_count.vhd scan keypress counter
library ieee ;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity scan_count is
port(
clk : in std_l
www.eeworm.com/read/240876/13189858
vhd key_scan.vhd
--key_scan.vhd keypress scaner
library ieee ;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use work.components.all;
entity key_scan is
port(
col : in std_logic_vector(3 d
www.eeworm.com/read/325597/13194927
vhd scan8.vhd
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
library work;
use work.my_package.all;
entity SCAN8 is
Port (RES
www.eeworm.com/read/325597/13194938
vhd scan_gen.vhd
-scan_gen.vhd keyboard scan_clock generator
library ieee ;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity scan_gen is
generic (osc_f : integer := 3686 ; osc_bit : integer
www.eeworm.com/read/325597/13195006
vhd scan2.vhd
--The IEEE standard 1164 package, declares std_logic, rising_edge(), etc.
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
entity scan2 is
www.eeworm.com/read/325597/13195034
vhd scan4.vhd
--The IEEE standard 1164 package, declares std_logic, rising_edge(), etc.
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
entity scan4 is
www.eeworm.com/read/325597/13195070
vhd scan_count.vhd
--scan_count.vhd scan keypress counter
library ieee ;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity scan_count is
port(
clk : in std_l
www.eeworm.com/read/325597/13195107
vhd key_scan.vhd
--key_scan.vhd keypress scaner
library ieee ;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use work.components.all;
entity key_scan is
port(
col : in std_logic_vector(3 d
www.eeworm.com/read/138605/13228486
vhd scan8.vhd
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
library work;
use work.my_package.all;
entity SCAN8 is
Port (RES