代码搜索：SW1
找到约 309 项符合「SW1」的源代码
代码结果 309
www.eeworm.com/read/326939/3465616
v oc8051_fpga_tb.v
// synopsys translate_off
`include "oc8051_timescale.v"
// synopsys translate_on
module oc8051_fpga_tb;
reg rst, clk, int1, int2, int3;
wire sw1, sw2, sw3, sw4, int_act;
wire [7:0] p0_out, p1_out,
www.eeworm.com/read/326939/3465633
v oc8051_fpga_tb.v
// synopsys translate_off
`include "oc8051_timescale.v"
// synopsys translate_on
module oc8051_fpga_tb;
reg rst, clk, int1, int2, int3;
wire sw1, sw2, sw3, sw4, int_act;
wire [7:0] p0_out, p1_out,
www.eeworm.com/read/326939/3465642
v oc8051_fpga_top.v
// synopsys translate_off
`include "oc8051_timescale.v"
// synopsys translate_on
module oc8051_fpga_top (clk, rst, int1, int2, int3, sw1, sw2, sw3, sw4, int_act, dispout, p0_out, p1_out, p2_out,
www.eeworm.com/read/405803/2282965
v oc8051_fpga_tb.v
// synopsys translate_off
`include "oc8051_timescale.v"
// synopsys translate_on
module oc8051_fpga_tb;
reg rst, clk, int1, int2, int3;
wire sw1, sw2, sw3, sw4, int_act;
wire [7:0] p0_out, p1_out,
www.eeworm.com/read/405803/2282982
v oc8051_fpga_tb.v
// synopsys translate_off
`include "oc8051_timescale.v"
// synopsys translate_on
module oc8051_fpga_tb;
reg rst, clk, int1, int2, int3;
wire sw1, sw2, sw3, sw4, int_act;
wire [7:0] p0_out, p1_out,
www.eeworm.com/read/405803/2282991
v oc8051_fpga_top.v
// synopsys translate_off
`include "oc8051_timescale.v"
// synopsys translate_on
module oc8051_fpga_top (clk, rst, int1, int2, int3, sw1, sw2, sw3, sw4, int_act, dispout, p0_out, p1_out, p2_out,
www.eeworm.com/read/357725/3013241
v oc8051_fpga_top.v
// synopsys translate_off
`include "oc8051_timescale.v"
// synopsys translate_on
module oc8051_fpga_top (clk, rst, int1, int2, int3, sw1, sw2, sw3, sw4, int_act, dispout, p0_out, p1_out, p2_out,
www.eeworm.com/read/429672/8795521
c 红外发送.c
#include
#define uchar unsigned char
#define uint unsigned int
sbit sw0=P1^0;
sbit sw1=P1^1;
sbit sw2=P1^2;
sbit sw3=P1^3;
uchar key=17;
sbit p38k=P2^0;
void delay(uint m)
{
uin
www.eeworm.com/read/372977/9483187
v lcd_init.v
//7.5 dotclk=1/8 clock 3.3M
module lcd_283rb06(cs,sclk,sdi,clock,hsync,vsync,enable,dotclk,rd,
red,green,blue,A,sw2,ce1,ce2,ce3,oe,we,sw1,sdao,
sclo,penirq,db18,db19,db20,db21,db22,db
www.eeworm.com/read/372977/9483545
bak lcd_init.v.bak
//7.5 dotclk=1/8 clock 3.3M
module lcd_283rb06(cs,sclk,sdi,clock,hsync,vsync,enable,dotclk,rd,
red,green,blue,A,sw2,ce1,ce2,ce3,oe,we,sw1,sdao,
sclo,penirq,db18,db19,db20,db21,db22,db