代码搜索：SW
找到约 10,000 项符合「SW」的源代码
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www.eeworm.com/read/393688/2472796
f90 sw_core.f90
#include
module sw_core
!
! This module contains vertical independent part of the Lagrangian dynamics
contains
!--------------------------------------------------------------------------
www.eeworm.com/read/386113/2573356
ssf sw1_4.ssf
SIMULATOR_SETTINGS
{
ESTIMATE_POWER_CONSUMPTION = OFF;
GLITCH_INTERVAL = "1 ns";
GLITCH_DETECTION = OFF;
SIMULATION_COVERAGE = ON;
CHECK_OUTPUTS = OFF;
SETUP_HOLD_DETECTION = OFF;
USE_C
www.eeworm.com/read/386113/2573359
csf sw1_4.csf
DEFAULT_DEVICE_OPTIONS
{
GENERATE_CONFIG_HEXOUT_FILE = OFF;
GENERATE_CONFIG_JBC_FILE_COMPRESSED = ON;
GENERATE_CONFIG_JBC_FILE = OFF;
GENERATE_CONFIG_JAM_FILE = OFF;
GENERATE_CONFIG_ISC_FIL
www.eeworm.com/read/386113/2573366
vhd sw1_4.vhd
LIBRARY IEEE;
USE IEEE.std_logic_1164.ALL;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
entity sw1_4 is
port(
clk : in std_logic;
ad_clk : in s
www.eeworm.com/read/386113/2573409
inc sw1_4.inc
-- WARNING: Do NOT edit the input and output ports in this file in a text
-- editor if you plan to continue editing the block that represents it in
-- the Block Editor! File corruption is VERY likel
www.eeworm.com/read/386113/2573448
eqn sw1_4.eqn
--C1_safe_q[1] is lpm_counter:cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[1] and unplaced
--operation mode is normal
C1_safe_q[1]_carry_eqn = C1L3;
C1_safe_q[1]_lut_out = C1_safe_q[1] $ C1_
www.eeworm.com/read/386113/2573461
vhd sw1_4.vhd
LIBRARY IEEE;
USE IEEE.std_logic_1164.ALL;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
entity sw1_4 is
port(
clk : in std_logic;
ad_clk : in s
www.eeworm.com/read/386113/2573465
qsf sw1_41.qsf
# Copyright (C) 1991-2004 Altera Corporation
# Any megafunction design, and related netlist (encrypted or decrypted),
# support information, device programming or simulation file, and any oth