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找到约 594 项符合
Regulator 的代码
sys_design.m
%sys_design is the function used in CtrlLAB for administrating system design tasks.
%
%Available Design Tasks are:
%
% 1 for lead/lag compensator design
% 2 for LQ optimal regulator/controller
regulate.ewb
Electronics Workbench Circuit File
Version: 5
Charset: ANSI
Description:
"This circuit is a 15 Volt complete power supply. It employs a shunt regulator configuration. The schematic is published i
regulate.ewb
Electronics Workbench Circuit File
Version: 5
Charset: ANSI
Description:
"This circuit is a 15 Volt complete power supply. It employs a shunt regulator configuration. The schematic is published i
sys_design.m
%sys_design is the function used in CtrlLAB for administrating system design tasks.
%
%Available Design Tasks are:
%
% 1 for lead/lag compensator design
% 2 for LQ optimal regulator/controller
sys_design.m
%sys_design is the function used in CtrlLAB for administrating system design tasks.
%
%Available Design Tasks are:
%
% 1 for lead/lag compensator design
% 2 for LQ optimal regulator/controller
regulate.ewb
Electronics Workbench Circuit File
Version: 5
Charset: ANSI
Description:
"This circuit is a 15 Volt complete power supply. It employs a shunt regulator configuration. The schematic is published i
sys_design.m
%sys_design is the function used in CtrlLAB for administrating system design tasks.
%
%Available Design Tasks are:
%
% 1 for lead/lag compensator design
% 2 for LQ optimal regulator/controller
regulate.ewb
Electronics Workbench Circuit File
Version: 5
Charset: ANSI
Description:
"This circuit is a 15 Volt complete power supply. It employs a shunt regulator configuration. The schematic is published i
sys_design.m
%sys_design is the function used in CtrlLAB for administrating system design tasks.
%
%Available Design Tasks are:
%
% 1 for lead/lag compensator design
% 2 for LQ optimal regulator/controller
sys_design.m
%sys_design is the function used in CtrlLAB for administrating system design tasks.
%
%Available Design Tasks are:
%
% 1 for lead/lag compensator design
% 2 for LQ optimal regulator/controller