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找到约 8,431 项符合
RF 的代码
ice159.dt
;R page registers setting
R0 ==0X00;
TCC ==0X01;
R2 ==0X02;
R3 ==0X03;
R4 ==0X04;
port5 ==0x05;
port6 ==0x06;
RE ==0x0e;
RF ==0X0F;
;IOC page registers setting
CONT ==0X01;
P5CR
icex56.dt
;R page registers setting
R0 ==0X00;
TCC ==0X01;
R2 ==0X02;
R3 ==0X03;
R4 ==0X04;
port5 ==0x05;
port6 ==0x06;
RF ==0X0F;
;IOC page registers setting
CONT ==0X01;
P5CR ==0X05;
P6CR
ice153.dt
;R page registers setting
R0 ==0X00;
TCC ==0X01;
R2 ==0X02;
R3 ==0X03;
R4 ==0X04;
port5 ==0x05;
port6 ==0x06;
RF ==0X0F;
;IOC page registers setting
CONT ==0X01;
P5CR ==0X05;
P6CR
pn.ncd
XILINX-XDB 0.1 STUB 0.1 ASCII
XILINX-XDM V1.4
###6100:XlxV32DM 3fff 17bceNrtOl1z2ziSf2Ue/HBXt2sTAL9xmQolUjI3lKghKdvah7D4OeXbGScbz8zlys5/v240SFEyk62dPE1NkhIb3QC60Z8ASF8w5j4xJi+y7rf7x/t3D/537JKZ31
反相输入式相加电路图.ewb
Electronics Workbench Circuit File
Version: 5
Charset: ANSI
Description:
"反相输入式相加电路"
" 当电路参数满足深负反馈条件，也就是开环放大倍数大于闭环放大倍数几十倍时，则放大器的反相输入端具有虚地特性。输出电压uo=—Rf（ui1/R1+ui2/R2+ui3/R3）。"
" 接入同相输入端的补偿电阻：R
同相输入式相加电路图.ewb
Electronics Workbench Circuit File
Version: 5
Charset: ANSI
Description:
"同相输入式相加电路图"
" 所有参与相加的信号均送到放大器的同相输入端。在满足深负反馈条件下，计算诸输入信号的传输比例系数时，可将输入端视为虚短路。"
" 输出电压为：uo=Rf2（ui1/R1+ui2/R2+ui3/R3)"
"
反相输入式相加电路图.ewb
Electronics Workbench Circuit File
Version: 5
Charset: ANSI
Description:
"反相输入式相加电路"
" 当电路参数满足深负反馈条件，也就是开环放大倍数大于闭环放大倍数几十倍时，则放大器的反相输入端具有虚地特性。输出电压uo=—Rf（ui1/R1+ui2/R2+ui3/R3）。"
" 接入同相输入端的补偿电阻：R
同相输入式相加电路图.ewb
Electronics Workbench Circuit File
Version: 5
Charset: ANSI
Description:
"同相输入式相加电路图"
" 所有参与相加的信号均送到放大器的同相输入端。在满足深负反馈条件下，计算诸输入信号的传输比例系数时，可将输入端视为虚短路。"
" 输出电压为：uo=Rf2（ui1/R1+ui2/R2+ui3/R3)"
"
mklib
ar rc LIB2 \
bio.o \
cat.o \
dhdm.o \
dh.o \
dhfdm.o \
dn.o \
du.o \
hp.o \
ht.o \
kl.o \
mem.o \
mx1.o \
mx2.o \
partab.o \
rf.o \
rk.o \
sys.o \
tc.o \
tm.o \
tty.o \
vp.o \
vs.o \
dsort.o \
dkleave
makefile
rt2x00lib-objs := rt2x00dev.o rt2x00mac.o rt2x00config.o
ifeq ($(CONFIG_RT2X00_LIB_DEBUGFS),y)
rt2x00lib-objs += rt2x00debug.o
endif
ifeq ($(CONFIG_RT2X00_LIB_RFKILL),y)
rt2x00lib-objs += rt2x00rf