代码搜索:REF

找到约 10,000 项符合「REF」的源代码

代码结果 10,000
www.eeworm.com/read/235592/4647909

java ref.java

/* -*- Mode: java; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 4 -*- * * ***** BEGIN LICENSE BLOCK ***** * Version: MPL 1.1/GPL 2.0 * * The contents of this file are subject to the Mozil
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ref convcode.ref

Now simulating point 1 out of 5 Breaking on point 1 with 3297 errors. Now simulating point 2 out of 5 Breaking on point 2 with 781 errors. Now simulating point 3 out of 5 Breaking on point 3 with 112
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ref timer.ref

Elapsed time = 0.000797055 seconds The sum of all integers from 0 to 999999 equals 1783293664
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ref bpsk.ref

There were 39224 received bits in error. There were 460776 correctly received bits. The error probability was 0.078448 The theoretical error probability is 0.0786496
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ref spread.ref

Simulating point nr 1 Itteration 1: ber = 0.13016 Breaking on point 1 with 6508 errors. Simulating point nr 2 Itteration 1: ber = 0.103 Breaking on point 2 with 5150 errors. Simulating point
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ref interleaver.ref

input = [1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20] output = [1 5 9 13 17 2 6 10 14 18 3 7 11 15 19 4 8 12 16 20] deinterleaved = [1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20]
www.eeworm.com/read/234507/4658914

ref reedsolomon.ref

Number of Reed-Solomon code-words to simulate: 1000 BSC Error probability : 0.01 RS m: 3 RS t: 2 Simulating an Reed-Solomon code with the following parameters: n = 7 k = 3 q = 8 The bit error probabil
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ref hdllib.ref

MO vga_wb_slave NULL vga_wb_slave.v vlg04/vga_wb_slave.bin MO vga_tgen NULL vga_tgen.v vlg7B/vga_tgen.bin MO vga_vtim NULL vga_vtim.v vlg4D/vga_vtim.bin MO generic_spram NULL generic_spram.v vlg53/
www.eeworm.com/read/233448/4689875

java ref.java

/* Ref.java -- Reference to a SQL structured type. Copyright (C) 1999, 2000 Free Software Foundation, Inc. This file is part of GNU Classpath. GNU Classpath is free software; you can redistribute
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ref hdllib.ref

MO can_fifo NULL can_fifo.v vlg01/can_fifo.bin MO can_registers NULL can_registers.v vlg49/can_registers.bin MO can_bsp NULL can_bsp.v vlg42/can_bsp.bin MO can_btl NULL can_btl.v vlg43/can_btl.bin