代码搜索：QL
找到约 821 项符合「QL」的源代码
代码结果 821
www.eeworm.com/read/177105/9469607
qclear
clear ql(TEST_IN)
clear ql(TEST_OUT)
clear ql(TEST_FAIL)
end
www.eeworm.com/read/423354/10569073
f90 code3d.f90
!!!!!!!!!!!!!!!!!!!!!!!!!!! Program 3.D !!!!!!!!!!!!!!!!!!!!!!!!!!!!!
!
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
!
www.eeworm.com/read/241836/13114060
m obnorm.m
function obnorm
global ed dd dd1 ni si e d g f s t
global m1 m2 m3 ms pp md ma x0 y0 sid dir az c fit1 fit2
global a ql pa3 qls w
lo=2062.648062470964;
m=m1+m2+m3;
n=2*dd;
sum=n*(n+1)/2.0;
sd
www.eeworm.com/read/241836/13114101
m obnorm.m
function obnorm
global ed dd dd1 ni si e d g f s t
global m1 m2 m3 ms pp md ma x0 y0 sid dir az c fit1 fit2
global a ql pa3 qls w
lo=2062.648062470964;
m=m1+m2+m3;
n=2*dd;
sum=n*(n+1)/2.0;
sd
www.eeworm.com/read/260985/11683294
c demo.c
#include
#include
#include
#include
#include
#include
#include "resource.h"
#include "index.h"
#include "stockrcv.h"
#include "fstrcv.h"
www.eeworm.com/read/149929/12330877
vhd count60s.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
--*************************
entity count60s is
port(
clk:in std_logic;
resets:
www.eeworm.com/read/149929/12332579
vhd count60s.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
--*************************
entity count60s is
port(
clk:in std_logic;
resets:
www.eeworm.com/read/149929/12333155
vhd count60s.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
--*************************
entity count60s is
port(
clk:in std_logic;
resets:
www.eeworm.com/read/228367/14388393
vhd count60s.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
--*************************
entity count60s is
port(
clk:in std_logic;
resets:
www.eeworm.com/read/369385/9651449
vhd count60s.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
--*************************
entity count60s is
port(
clk:in std_logic;
resets: