代码搜索：QDR SRAM

找到约 7,112 项符合「QDR SRAM」的源代码

代码结果 7,112
热门代码： main.c GPIO I2C SPI UART timer interrupt ADC PWM LED
www.eeworm.com/read/209093/4987262

cfg m5213evb_pne.cfg

ResetHalt ; Set RAMBAR1 (SRAM) writecontrolreg 0x0C05 0x20000021 ;writecontrolreg 0x0C05 0x100021 ; Set FLASHBAR (Flash) writecontrolreg 0x0C04 0x00000021 ; Enable PST[3:0] signals writem
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www.eeworm.com/read/203049/5042239

bld test_mec_eb40a.bld

#!build default: program :outputname=ghs\test_mec_eb40a\test_mec_eb40a.ghs :object_dir=ghs\test_mec_eb40a :defines=AT91R40008 test_mec01.c C C:\at91\software\targets\ghs_lnk_int_sram_ice.lnk lin
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www.eeworm.com/read/203049/5043330

bld test_mec_eb40a.bld

#!build default: program :outputname=ghs\test_mec_eb40a\test_mec_eb40a.ghs :object_dir=ghs\test_mec_eb40a :defines=AT91R40008 test_mec01.c C C:\at91\software\targets\ghs_lnk_int_sram_ice.lnk lin
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www.eeworm.com/read/345878/3195719

bld test_mec_eb40a.bld

#!build default: program :outputname=ghs\test_mec_eb40a\test_mec_eb40a.ghs :object_dir=ghs\test_mec_eb40a :defines=AT91R40008 test_mec01.c C C:\at91\software\targets\ghs_lnk_int_sram_ice.lnk lin
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www.eeworm.com/read/345073/3203712

h extreg.h

#include #include #include #define SRAM XBYTE[0x8000] #define FLASH0 XBYTE[0x0084] #define FLASH1 XBYTE[0x0085] #define FLASH2 XBYTE[0x0086]
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www.eeworm.com/read/316872/3588562

makefile

# # Makefile for BestComm & co # bestcomm-core-objs := bestcomm.o sram.o bestcomm-ata-objs := ata.o bcom_ata_task.o bestcomm-fec-objs := fec.o bcom_fec_rx_task.o bcom_fec_tx_task.o bestcomm-gen-bd-ob
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www.eeworm.com/read/312645/3663358

entries

/redboot_RAM.ecm/1.1/Fri Aug 10 19:27:56 2001// /redboot_ROM.ecm/1.1/Fri Aug 10 19:27:56 2001// /redboot_SRAM1.ecm/1.1/Fri Aug 10 19:27:56 2001// /stubrom.perm/1.3/Tue Jul 31 21:15:40 2001// D
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www.eeworm.com/read/293739/3928884

entries

/AsyncLog.vhd/1.1/Thu May 2 11:26:55 2002// /AsyncStim.vhd/1.1/Thu May 2 11:26:55 2002// /DebugSystem_TB.vhd/1.1/Wed Aug 7 14:21:24 2002// /SRAM.vhd/1.4/Sun Nov 24 13:55:10 2002// /StimLog.vhd/1.1/
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www.eeworm.com/read/433521/1883216

cfg m5211demo_pne.cfg

ResetHalt ; Set RAMBAR1 (SRAM) writecontrolreg 0x0C05 0x20000021 ;writecontrolreg 0x0C05 0x100021 ; Set FLASHBAR (Flash) writecontrolreg 0x0C04 0x00000021 ; Enable PST[3:0] signals writem
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www.eeworm.com/read/433521/1883222

cfg m5213evb_pne.cfg

ResetHalt ; Set RAMBAR1 (SRAM) writecontrolreg 0x0C05 0x20000021 ;writecontrolreg 0x0C05 0x100021 ; Set FLASHBAR (Flash) writecontrolreg 0x0C04 0x00000021 ; Enable PST[3:0] signals writem
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